Searched refs:ADDU (Results 1 – 18 of 18) sorted by relevance
| /external/openssl/crypto/bn/asm/ |
| D | mips.pl | 60 $ADDU="daddu";
75 $ADDU="addu";
153 $ADDU $t1,$v0
159 $ADDU $t1,$at
160 $ADDU $v0,$t0
164 $ADDU $v0,$at
168 $ADDU $t3,$v0
172 $ADDU $t3,$at
173 $ADDU $v0,$t2
177 $ADDU $v0,$at
[all …]
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| D | mips-mont.pl | 77 $ADDU="daddu";
84 $ADDU="addu";
195 $ADDU $lo1,$lo0
197 $ADDU $hi1,$at
212 $ADDU $lo0,$alo,$hi0
213 $ADDU $lo1,$nlo,$hi1
216 $ADDU $hi0,$ahi,$at
217 $ADDU $hi1,$nhi,$t0
221 $ADDU $lo1,$lo0
224 $ADDU $hi1,$at
[all …]
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| /external/openssl/crypto/sha/asm/ |
| D | sha512-mips.pl | 85 $ADDU="daddu";
99 $ADDU="addu";
158 $ADDU $T1,$X[0],$h # $i
175 $ADDU $T1,$tmp2
178 $ADDU $T1,$tmp0
194 $ADDU $T1,$tmp2 # +=K[$i]
195 $ADDU $h,$tmp1
197 $ADDU $d,$T1
198 $ADDU $h,$T1
211 $ADDU @X[0],@X[9] # +=X[i+9]
[all …]
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| /external/libffi/src/mips/ |
| D | n32.S | 75 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
83 ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
101 ADDU t9, t9, t8
311 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
410 ADDU a1, $sp, V0_OFF2
411 ADDU a2, $sp, A0_OFF2
412 ADDU a3, $sp, F12_OFF2
472 ADDU $sp, SIZEOF_FRAME2
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| D | ffitarget.h | 127 # define ADDU addu macro
134 # define ADDU daddu
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| D | o32.S | 68 ADDU v0, bytes, 7 # make sure it is aligned
75 ADDU a0, $sp, 4 * FFI_SIZEOF_ARG
83 ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
179 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
301 ADDU $sp, SIZEOF_FRAME2
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| /external/v8/src/mips/ |
| D | constants-mips.cc | 256 case ADDU: in InstructionType()
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| D | constants-mips.h | 326 ADDU = ((4 << 3) + 1), enumerator
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| D | disasm-mips.cc | 687 case ADDU: in DecodeTypeRegister()
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| D | simulator-mips.cc | 1802 case ADDU: in ConfigureTypeRegister()
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| D | assembler-mips.cc | 1200 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 369 unsigned ADDU = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu; in ExpandEhReturn() local
383 BuildMI(MBB, I, I->getDebugLoc(), TM.getInstrInfo()->get(ADDU), SP) in ExpandEhReturn()
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| D | MipsDSPInstrFormats.td | 33 // ADDU.QB sub-class format.
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| D | Mips16InstrInfo.td | 522 // Format: ADDU rz, rx, ry MIPS16e
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| /external/libffi/ |
| D | ChangeLog | 29 * src/mips/n32.S (ffi_call_N32): Replace dadd with ADDU, dsub with
30 SUBU, add with ADDU and use smaller code sequences.
220 * src/mips/ffitarget.h (REG_L, REG_S, SUBU, ADDU, SRL, LI): Indent.
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| /external/valgrind/main/none/tests/mips32/ |
| D | MIPS32int.stdout.exp-mips32 | 34 ADDU
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| D | MIPS32int.stdout.exp-BE | 34 ADDU
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| D | MIPS32int.stdout.exp | 34 ADDU
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