/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfAccelTable.cpp | 154 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitHashes() local 155 HE = Buckets[i].end(); HI != HE; ++HI) { in EmitHashes() 157 Asm->EmitInt32((*HI)->HashValue); in EmitHashes() 168 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitOffsets() local 169 HE = Buckets[i].end(); HI != HE; ++HI) { in EmitOffsets() 173 MCBinaryExpr::CreateSub(MCSymbolRefExpr::Create((*HI)->Sym, Context), in EmitOffsets() 187 for (HashList::const_iterator HI = Buckets[i].begin(), in EmitData() local 188 HE = Buckets[i].end(); HI != HE; ++HI) { in EmitData() 190 Asm->OutStreamer.EmitLabel((*HI)->Sym); in EmitData() 191 Asm->OutStreamer.AddComment((*HI)->Str); in EmitData() [all …]
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/external/valgrind/main/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32 | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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D | MIPS32int.stdout.exp-BE | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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D | MIPS32int.stdout.exp | 99 div $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 100 div $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 101 div $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 102 div $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000000 LO 0xffffffff 103 div $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 105 divu $t0, $t1 :: rs 0x00000006 rt 0x00000002 HI 0x00000000 LO 0x00000003 106 divu $t0, $t1 :: rs 0x7fffffff rt 0x7fffffff HI 0x00000000 LO 0x00000001 107 divu $t0, $t1 :: rs 0xffffffff rt 0x00000001 HI 0x00000000 LO 0xffffffff 108 divu $t0, $t1 :: rs 0x00000001 rt 0xffffffff HI 0x00000001 LO 0x00000000 109 divu $t0, $t1 :: rs 0x00000002 rt 0x00000006 HI 0x00000002 LO 0x00000000 [all …]
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/external/llvm/test/CodeGen/AArch64/ |
D | basic-pic.ll | 39 ; CHECK: adrp x[[HI:[0-9]+]], hiddenvar 40 ; CHECK: ldr w0, [x[[HI]], #:lo12:hiddenvar] 51 ; CHECK: adrp [[HI:x[0-9]+]], hiddenvar 52 ; CHECK: add x0, [[HI]], #:lo12:hiddenvar
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/external/qemu/distrib/sdl-1.2.15/src/video/ |
D | SDL_blit_1.c | 71 #define HI 1 macro 74 #define HI 0 macro 124 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2() 128 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2() 139 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2() 156 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2() 160 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2() 171 (map[src[HI]]<<16)|(map[src[LO]]); in Blit1to2()
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D | SDL_blit_N.c | 846 #define HI 1 macro 849 #define HI 0 macro 977 *(Uint32 *)(dst) = (((((src[HI])&0x00F80000)>>9)| \ 978 (((src[HI])&0x0000F800)>>6)| \ 979 (((src[HI])&0x000000F8)>>3))<<16)| \ 1097 *(Uint32 *)(dst) = (((((src[HI])&0x00F80000)>>8)| \ 1098 (((src[HI])&0x0000FC00)>>5)| \ 1099 (((src[HI])&0x000000F8)>>3))<<16)| \ 1215 #define RGB565_32(dst, src, map) (map[src[LO]*2] + map[src[HI]*2+1])
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/external/icu4c/data/translit/ |
D | JapaneseKana_Latin_BGN.txt | 73 ヒョウ → hyō ; # KATAKANA LETTER HI + SMALL YO + U 74 ヒュウ → hyū ; # KATAKANA LETTER HI + SMALL YU + U 75 ヒャ → hya ; # KATAKANA LETTER HI + SMALL YA 76 ヒョ → hyo ; # KATAKANA LETTER HI + SMALL YO 77 ヒュ → hyu ; # KATAKANA LETTER HI + SMALL YU 78 ヒ → hi ; # KATAKANA LETTER HI 220 ひょう → hyō ; # HIRAGANA LETTER HI + SMALL YO + U 221 ひゅう → hyū ; # HIRAGANA LETTER HI + SMALL YU + U 222 ひゃ → hya ; # HIRAGANA LETTER HI + SMALL YA 223 ひょ → hyo ; # HIRAGANA LETTER HI + SMALL YO [all …]
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 38 HI, // Unsigned higher Greater than, or unordered enumerator 58 case HI: return LS; in getOppositeCondition() 59 case LS: return HI; in getOppositeCondition() 78 case ARMCC::HI: return "hi"; in ARMCondCodeToString()
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/external/openssl/crypto/sha/asm/ |
D | sha512-armv4.S | 4 # define HI 4 macro 7 # define HI 0 macro 78 ldr r8,[r0,#32+HI] 80 ldr r10, [r0,#48+HI] 82 ldr r12, [r0,#56+HI] 89 ldr r6,[r0,#0+HI] 91 ldr r4,[r0,#8+HI] 93 ldr r10, [r0,#16+HI] 95 ldr r12, [r0,#24+HI] 103 ldr r4,[r0,#40+HI] [all …]
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/external/webkit/Source/JavaScriptCore/assembler/ |
D | MacroAssemblerSH4.cpp | 40 const Condition MacroAssemblerSH4::UGreaterThan = SH4Assembler::HI; 47 const Condition MacroAssemblerSH4::Above = SH4Assembler::HI;
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/external/aac/libSBRenc/src/ |
D | sbr_encoder.cpp | 586 if (hSbrElement->sbrConfigData.freqBandTable[HI]) in sbrEncoder_ElementClose() 587 FreeRam_Sbr_freqBandTableHI(&hSbrElement->sbrConfigData.freqBandTable[HI]); in sbrEncoder_ElementClose() 672 if(FDKsbrEnc_UpdateHiRes(sbrConfigData->freqBandTable[HI], in updateFreqBandTable() 673 &sbrConfigData->nSfb[HI], in updateFreqBandTable() 684 sbrConfigData->freqBandTable[HI], in updateFreqBandTable() 685 sbrConfigData->nSfb[HI]); in updateFreqBandTable() 712 sbrConfigData->freqBandTable[HI][0], in resetEnvChannel() 722 hEnv->sbrCodeNoiseFloor.nSfb[HI] = hEnv->TonCorr.sbrNoiseFloorEstimate.noNoiseBands; in resetEnvChannel() 725 hEnv->sbrCodeEnvelope.nSfb[HI] = sbrConfigData->nSfb[HI]; in resetEnvChannel() 727 hEnv->encEnvData.noHarmonics = sbrConfigData->nSfb[HI]; in resetEnvChannel() [all …]
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D | sbr_def.h | 155 #define HI 1 macro
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/external/grub/stage2/ |
D | iso9660.h | 64 typedef int int16_t __attribute__((mode(HI))); 65 typedef unsigned int u_int16_t __attribute__((mode(HI)));
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.h | 39 HI, // Unsigned higher Greater than, or unordered enumerator 65 case A64CC::HI: return "hi"; in A64CondCodeToString() 89 .Case("hi", A64CC::HI) in A64StringToCondCode()
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/external/llvm/test/MC/Mips/ |
D | xgot.ll | 10 ; For the xgot case we want to see R_MIPS_[GOT|CALL]_[HI|LO]16.
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/external/clang/test/Sema/ |
D | attr-mode.c | 6 typedef int i16_1 __attribute((mode(HI)));
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/ |
D | de-DE_gl0_kdt_mgc3.pkb | 54 ��E��:sN�`�Ř�trvO`���\k���K)�l��#p(4!�hF�>2��hF�>HI,;�����c_�?�6�8B…
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/external/llvm/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 225 def HI : Register<"hi">, DwarfRegNum<[64]>; 229 def HI64 : RegisterWithSubRegs<"hi", [HI]>; 248 def AC0 : MipsRegWithSubRegs<0, "ac0", [LO, HI]>; 329 def HILO : RegisterClass<"Mips", [i32], 32, (add HI, LO)>, Unallocatable;
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D | MipsInstrInfo.td | 384 [(op CPURegsOpnd:$rs, CPURegsOpnd:$rt, LO, HI)], IIImul, FrmR> { 385 let Defs = [HI, LO]; 386 let Uses = [HI, LO]; 921 def MULT : Mult<"mult", IIImul, CPURegsOpnd, [HI, LO]>, MULT_FM<0, 0x18>; 922 def MULTu : Mult<"multu", IIImul, CPURegsOpnd, [HI, LO]>, MULT_FM<0, 0x19>; 923 def SDIV : Div<MipsDivRem, "div", IIIdiv, CPURegsOpnd, [HI, LO]>, 925 def UDIV : Div<MipsDivRemU, "divu", IIIdiv, CPURegsOpnd, [HI, LO]>, 928 def MTHI : MoveToLOHI<"mthi", CPURegs, [HI]>, MTLO_FM<0x11>; 930 def MFHI : MoveFromLOHI<"mfhi", CPURegs, [HI]>, MFLO_FM<0x10>;
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D | MipsSEInstrInfo.cpp | 98 else if (SrcReg == Mips::HI) in copyPhysReg() 108 else if (DestReg == Mips::HI) in copyPhysReg()
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D | Mips16InstrInfo.td | 651 let Defs = [HI, LO]; 660 let Defs = [HI, LO]; 789 // Purpose: Move From HI Register 790 // To copy the special purpose HI register to a GPR. 793 let Uses = [HI]; 813 let Defs = [HI, LO]; 819 let Defs = [HI, LO]; 830 let Defs = [HI, LO]; 841 let Defs = [HI, LO];
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/ |
D | fr-FR_nk0_kpdf_lfz.pkb | 179 …���H��ؙa�؎I���HI���uJ���#|��n��ZK����E��j.����J��B��…
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/external/qemu/target-mips/ |
D | machine.c | 15 qemu_put_betls(f, &tc->HI[i]); in save_tc() 162 qemu_get_betls(f, &tc->HI[i]); in load_tc()
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D | op_helper.c | 146 return ((uint64_t)(env->active_tc.HI[0]) << 32) | (uint32_t)env->active_tc.LO[0]; in get_HILO() 152 env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HILO() 158 arg1 = env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HIT0_LO() 164 env->active_tc.HI[0] = (int32_t)(HILO >> 32); in set_HI_LOT0() 269 muls64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2); in helper_dmult() 274 mulu64(&(env->active_tc.LO[0]), &(env->active_tc.HI[0]), arg1, arg2); in helper_dmultu() 1352 return env->active_tc.HI[sel]; in helper_mfthi() 1354 return env->tcs[other_tc].HI[sel]; in helper_mfthi() 1402 env->active_tc.HI[sel] = arg1; in helper_mtthi() 1404 env->tcs[other_tc].HI[sel] = arg1; in helper_mtthi()
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