| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 32 Implicit = 0x4, enumerator
40 ImplicitDefine = Implicit | Define,
41 ImplicitKill = Implicit | Kill
70 flags & RegState::Implicit,
342 return B ? RegState::Implicit : 0; in getImplRegState()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUIndirectAddressing.cpp | 120 MOV.addReg(DstReg, RegState::Define | RegState::Implicit); in runOnMachineFunction()
271 .addReg(Reg, RegState::Implicit); in runOnMachineFunction()
308 Mov.addReg(IndirectReg, RegState::Implicit | RegState::Kill); in runOnMachineFunction()
309 Mov.addReg(LiveAddressRegisterMap[Address], RegState::Implicit); in runOnMachineFunction()
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| D | SILowerControlFlow.cpp | 384 .addReg(AMDGPU::M0, RegState::Implicit) in IndirectSrc()
385 .addReg(Vec, RegState::Implicit); in IndirectSrc()
403 .addReg(AMDGPU::M0, RegState::Implicit) in IndirectDst()
404 .addReg(Dst, RegState::Implicit); in IndirectDst()
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| D | R600InstrInfo.cpp | 60 RegState::Define | RegState::Implicit); in copyPhysReg()
516 MIB.addReg(AMDGPU::PREDICATE_BIT, RegState::Implicit); in PredicateInstruction()
621 .addReg(AMDGPU::AR_X, RegState::Implicit); in buildIndirectWrite()
638 .addReg(AMDGPU::AR_X, RegState::Implicit); in buildIndirectRead()
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| D | R600ISelLowering.cpp | 192 .addReg(T0, RegState::Implicit) in EmitInstrWithCustomInserter()
193 .addReg(T1, RegState::Implicit); in EmitInstrWithCustomInserter()
217 .addReg(T0, RegState::Implicit) in EmitInstrWithCustomInserter()
218 .addReg(T1, RegState::Implicit); in EmitInstrWithCustomInserter()
295 MIB.addReg(MFI->LiveOuts[i], RegState::Implicit); in EmitInstrWithCustomInserter()
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| D | SIInstrInfo.cpp | 137 Builder.addReg(DestReg, RegState::Define | RegState::Implicit); in copyPhysReg()
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| /external/llvm/test/YAMLParser/ |
| D | spec-07-12a.data | 3 # Implicit document. Root
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| D | spec-10-11.data | 6 ? explicit key3, # Implicit empty
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| /external/clang/include/clang/AST/ |
| D | DeclBase.h | 255 unsigned Implicit : 1; variable
309 HasAttrs(false), Implicit(false), Used(false), Referenced(false), in Decl()
319 HasAttrs(false), Implicit(false), Used(false), Referenced(false), in Decl()
473 bool isImplicit() const { return Implicit; } in isImplicit()
474 void setImplicit(bool I = true) { Implicit = I; }
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| D | ExprCXX.h | 655 bool Implicit : 1; variable
665 Loc(L), Implicit(isImplicit) { } in CXXThisExpr()
675 bool isImplicit() const { return Implicit; } in isImplicit()
676 void setImplicit(bool I) { Implicit = I; } in setImplicit()
1217 Capture(SourceLocation Loc, bool Implicit,
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| /external/eigen/doc/ |
| D | TopicLinearAlgebraDecompositions.dox | 37 <td>Blocking, Implicit MT</td>
248 <dt><b>Implicit Multi Threading (MT)</b></dt>
249 …<dd>Means the algorithm can take advantage of multicore processors via OpenMP. "Implicit" means th…
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| /external/clang/test/SemaObjCXX/ |
| D | instantiate-expr.mm | 55 // Implicit setter/getter
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| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 1177 MIB.addReg(SrcRegS, RegState::Implicit); in expandPostRAPseudo()
3874 MIB.addReg(SrcReg, RegState::Implicit); in setExecutionDomain()
3905 MIB.addReg(DstReg, RegState::Define | RegState::Implicit); in setExecutionDomain()
3907 MIB.addReg(ImplicitSReg, RegState::Implicit); in setExecutionDomain()
3940 MIB.addReg(DstReg, RegState::Implicit | RegState::Define); in setExecutionDomain()
3941 MIB.addReg(SrcReg, RegState::Implicit); in setExecutionDomain()
3943 MIB.addReg(ImplicitSReg, RegState::Implicit); in setExecutionDomain()
3978 NewMIB.addReg(SrcReg, RegState::Implicit); in setExecutionDomain()
3997 MIB.addReg(SrcReg, RegState::Implicit); in setExecutionDomain()
4001 MIB.addReg(DstReg, RegState::Define | RegState::Implicit); in setExecutionDomain()
[all …]
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| D | ARMFastISel.cpp | 2173 MIB.addReg(RetRegs[i], RegState::Implicit); in SelectRet()
2274 MIB.addReg(RegArgs[i], RegState::Implicit); in ARMEmitLibcall()
2418 MIB.addReg(RegArgs[i], RegState::Implicit); in SelectCall()
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| /external/llvm/lib/Target/X86/ |
| D | X86FloatingPoint.cpp | 1664 .addReg(X86::EAX, RegState::Define | RegState::Implicit) in handleSpecialFP()
1665 .addReg(X86::EDX, RegState::Define | RegState::Implicit) in handleSpecialFP()
1666 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); in handleSpecialFP()
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| D | X86FastISel.cpp | 833 MIB.addReg(RetRegs[i], RegState::Implicit); in X86SelectRet()
1969 MIB.addReg(X86::EBX, RegState::Implicit); in DoSelectCall()
1972 MIB.addReg(X86::AL, RegState::Implicit); in DoSelectCall()
1976 MIB.addReg(RegArgs[i], RegState::Implicit); in DoSelectCall()
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| D | X86FrameLowering.cpp | 924 .addReg(StackPtr, RegState::Define | RegState::Implicit) in emitPrologue()
925 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit) in emitPrologue()
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| D | X86ISelLowering.cpp | 14075 .addReg(X86::RDI, RegState::Implicit) in EmitLoweredSegAlloca()
14132 .addReg(X86::RAX, RegState::Implicit) in EmitLoweredWinAlloca()
14133 .addReg(X86::RSP, RegState::Implicit) in EmitLoweredWinAlloca()
14134 .addReg(X86::RAX, RegState::Define | RegState::Implicit) in EmitLoweredWinAlloca()
14135 .addReg(X86::RSP, RegState::Define | RegState::Implicit) in EmitLoweredWinAlloca()
14136 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); in EmitLoweredWinAlloca()
14143 .addReg(X86::RAX, RegState::Implicit) in EmitLoweredWinAlloca()
14144 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit); in EmitLoweredWinAlloca()
14156 .addReg(X86::EAX, RegState::Implicit) in EmitLoweredWinAlloca()
14157 .addReg(X86::ESP, RegState::Implicit) in EmitLoweredWinAlloca()
[all …]
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| /external/clang/include/clang/Basic/ |
| D | DiagnosticGroups.td | 14 def Implicit : DiagGroup<"implicit", [
412 Implicit,
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| /external/clang/lib/AST/ |
| D | ExprCXX.cpp | 801 LambdaExpr::Capture::Capture(SourceLocation Loc, bool Implicit, in Capture() argument
807 if (Implicit) in Capture()
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| /external/clang/test/CodeGenObjC/ |
| D | arc.m | 671 // Implicit null of 'self', i.e. direct transfer of ownership.
679 // Implicit write of result back into 'self'. This is not supposed to
717 // Implicit null of 'self', i.e. direct transfer of ownership.
723 // Implicit write of result back into 'self'. This is not supposed to
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| /external/clang/lib/Serialization/ |
| D | ASTReaderStmt.cpp | 903 bool Implicit = Record[Idx++] != 0; in VisitObjCPropertyRefExpr() local
904 if (Implicit) { in VisitObjCPropertyRefExpr()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16InstrInfo.td | 85 // Implicit use of T8
134 // Implicit use of T8
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| /external/llvm/lib/CodeGen/ |
| D | IfConversion.cpp | 1004 MIB.addReg(Reg, RegState::Implicit | RegState::Undef); in UpdatePredRedefs()
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| /external/srtp/doc/ |
| D | rfc3711.txt | 96 9.5.2. Implicit Header Authentication . . . . . . . . . 43
2372 9.5.2. Implicit Header Authentication
|