/external/llvm/lib/CodeGen/ |
D | MachineCopyPropagation.cpp | 68 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in SourceNoLongerAvailable() 192 for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock() 212 for (MCRegAliasIterator AI(Def, TRI, false); AI.isValid(); ++AI) { in CopyPropagateBlock() 257 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock() 294 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in CopyPropagateBlock()
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D | CriticalAntiDepBreaker.cpp | 65 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { in StartBlock() 80 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { in StartBlock() 187 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction() 292 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in ScanInstruction()
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D | AggressiveAntiDepBreaker.cpp | 159 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { in StartBlock() 175 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in StartBlock() 375 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction() 406 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in PrescanInstruction() 660 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters()
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D | RegisterScavenging.cpp | 41 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in isAliasUsed() 288 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI) in findSurvivorReg()
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D | RegisterClassInfo.cpp | 54 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
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D | DeadMachineInstructionElim.cpp | 176 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in runOnMachineFunction()
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D | RegAllocFast.cpp | 368 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in usePhysReg() 419 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in definePhysReg() 467 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { in calcSpillCost() 721 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in handleThroughOperands()
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D | CallingConvLower.cpp | 60 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in MarkAllocated()
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D | BranchFolding.cpp | 1490 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in findHoistingInsertPosAndDeps() 1551 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in findHoistingInsertPosAndDeps() 1558 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in findHoistingInsertPosAndDeps() 1686 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistCommonCodeInSuccs() 1699 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistCommonCodeInSuccs()
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D | MachineLICM.cpp | 448 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in ProcessMI() 468 for (MCRegAliasIterator AS(Reg, TRI, true); AS.isValid(); ++AS) { in ProcessMI() 520 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA() 543 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HoistRegionPostRA()
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D | MachineCSE.cpp | 210 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in hasLivePhysRegDefUses() 239 for (MCRegAliasIterator AI(PhysDefs[i], TRI, true); AI.isValid(); ++AI) in hasLivePhysRegDefUses()
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D | MachineRegisterInfo.cpp | 356 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) in isConstantPhysReg()
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D | MachineInstr.cpp | 1520 for (MCRegAliasIterator AI(Reg, TM->getRegisterInfo(), true); in print() 1661 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterKilled() 1734 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); in addRegisterDead()
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D | ExecutionDepsFix.cpp | 672 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); in runOnMachineFunction()
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D | ScheduleDAGInstrs.cpp | 248 for (MCRegAliasIterator Alias(MO.getReg(), TRI, true); in addPhysRegDataDeps() 295 for (MCRegAliasIterator Alias(MO.getReg(), TRI, true); in addPhysRegDeps()
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D | MachineBasicBlock.cpp | 1143 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true); in computeRegisterLiveness()
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/external/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 229 friend class MCRegAliasIterator; variable 443 class MCRegAliasIterator : public MCRegisterInfo::DiffListIterator { 445 MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, in MCRegAliasIterator() function
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/external/llvm/lib/Target/AArch64/ |
D | AArch64AsmPrinter.cpp | 50 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) { in printModifiedFPRAsmOperand() 76 for (MCRegAliasIterator AR(MO.getReg(), TRI, true); AR.isValid(); ++AR) { in printModifiedGPRAsmOperand()
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/external/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 323 for (MCRegAliasIterator AI(*R, &TRI, true); AI.isValid(); ++AI) in setCallerSaved() 333 for (MCRegAliasIterator AI(R, &TRI, false); AI.isValid(); ++AI) in setUnallocatableRegs() 384 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in isRegInSet()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonCallingConvLower.cpp | 59 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in MarkAllocated()
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/external/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 283 for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true); in IsRegInSet()
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/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 372 for (MCRegAliasIterator AI(GPR64[n], this, true); AI.isValid(); ++AI) in getReservedRegs() 377 for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI) in getReservedRegs()
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D | X86FrameLowering.cpp | 128 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI) in findDeadCallerSavedReg()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | ScheduleDAGFast.cpp | 454 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in CheckForLiveRegDef()
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D | ScheduleDAGRRList.cpp | 1210 for (MCRegAliasIterator AliasI(Reg, TRI, true); AliasI.isValid(); ++AliasI) { in CheckForLiveRegDef()
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