Searched refs:RegPressure (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 59 RegPressure.resize(NumRC); in ResourcePriorityQueue()
61 std::fill(RegPressure.begin(), RegPressure.end(), 0); in ResourcePriorityQueue()
378 if ((RegPressure[RC->getID()] + in regPressureDelta()
380 (RegPressure[RC->getID()] + in regPressureDelta()
493 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID()); in scheduledNode()
504 if (RegPressure[RC->getID()] > in scheduledNode()
506 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID()); in scheduledNode()
507 else RegPressure[RC->getID()] = 0; in scheduledNode()
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| D | ScheduleDAGRRList.cpp | 1641 std::vector<unsigned> RegPressure; member in __anonb56d9db60211::RegReductionPQBase
1661 RegPressure.resize(NumRC); in RegReductionPQBase()
1663 std::fill(RegPressure.begin(), RegPressure.end(), 0); in RegReductionPQBase()
1687 std::fill(RegPressure.begin(), RegPressure.end(), 0); in releaseState()
1937 unsigned RP = RegPressure[Id]; in dumpRegPressure()
1964 if ((RegPressure[RCId] + Cost) >= RegLimit[RCId]) in HighRegPressure()
1983 if (RegPressure[RCId] >= RegLimit[RCId]) in MayReduceRegPressure()
2015 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff()
2030 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff()
2077 RegPressure[RCId] += Cost; in scheduledNode()
[all …]
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| D | SelectionDAGISel.cpp | 231 if (TLI.getSchedulingPreference() == Sched::RegPressure) in createDefaultScheduler()
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| /external/llvm/lib/CodeGen/ |
| D | MachineLICM.cpp | 93 SmallVector<unsigned, 8> RegPressure; member in __anondeff27f60111::MachineLICM
141 RegPressure.clear(); in releaseMemory()
342 RegPressure.resize(NumRC); in runOnMachineFunction()
343 std::fill(RegPressure.begin(), RegPressure.end(), 0); in runOnMachineFunction()
654 BackTrace.push_back(RegPressure); in EnterScope()
797 std::fill(RegPressure.begin(), RegPressure.end(), 0); in InitRegPressure()
825 RegPressure[RCId] += RCCost; in InitRegPressure()
830 RegPressure[RCId] += RCCost; in InitRegPressure()
832 RegPressure[RCId] -= RCCost; in InitRegPressure()
859 if (RCCost > RegPressure[RCId]) in UpdateRegPressure()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineScheduler.h | 226 IntervalPressure RegPressure; variable
258 Topo(SUnits, &ExitSU), RPTracker(RegPressure), CurrentTop(), in ScheduleDAGMI()
309 const IntervalPressure &getRegPressure() const { return RegPressure; } in getRegPressure()
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| D | ResourcePriorityQueue.h | 53 std::vector<unsigned> RegPressure; variable
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| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 213 setSchedulingPreference(Sched::RegPressure); in InitAMDILLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 64 RegPressure, // Scheduling for lowest register pressure. enumerator
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 90 setSchedulingPreference(Sched::RegPressure); in NVPTXTargetLowering()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 80 setSchedulingPreference(Sched::RegPressure); in XCoreTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 857 setSchedulingPreference(Sched::RegPressure); in ARMTargetLowering()
1104 return Sched::RegPressure; in getSchedulingPreference()
1115 return Sched::RegPressure; in getSchedulingPreference()
1123 return Sched::RegPressure; in getSchedulingPreference()
1128 return Sched::RegPressure; in getSchedulingPreference()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 186 setSchedulingPreference(Sched::RegPressure); in X86TargetLowering()
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