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Searched refs:RegUnit (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/CodeGen/
DLiveRegMatrix.cpp129 unsigned RegUnit) { in query() argument
130 LiveIntervalUnion::Query &Q = Queries[RegUnit]; in query()
131 Q.init(UserTag, &VirtReg, &Matrix[RegUnit]); in query()
DMachineTraceMetrics.cpp593 unsigned RegUnit; member
598 unsigned getSparseSetIndex() const { return RegUnit; } in getSparseSetIndex()
600 LiveRegUnit(unsigned RU) : RegUnit(RU), Cycle(0), MI(0), Op(0) {} in LiveRegUnit()
1012 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle)); in computeInstrHeights()
1013 DEBUG(dbgs() << ' ' << PrintRegUnit(RI->RegUnit, MTM.TRI) in computeInstrHeights()
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h516 MCRegUnitRootIterator(unsigned RegUnit, const MCRegisterInfo *MCRI) { in MCRegUnitRootIterator() argument
517 assert(RegUnit < MCRI->getNumRegUnits() && "Invalid register unit"); in MCRegUnitRootIterator()
518 Reg0 = MCRI->RegUnitRoots[RegUnit][0]; in MCRegUnitRootIterator()
519 Reg1 = MCRI->RegUnitRoots[RegUnit][1]; in MCRegUnitRootIterator()
/external/llvm/utils/TableGen/
DCodeGenRegisters.h395 struct RegUnit { struct
410 RegUnit() : Weight(0), RegClassUnitSetsIdx(0) { Roots[0] = Roots[1] = 0; } in RegUnit() argument
454 SmallVector<RegUnit, 8> RegUnits;
587 RegUnit &getRegUnit(unsigned RUID) { return RegUnits[RUID]; } in getRegUnit()
588 const RegUnit &getRegUnit(unsigned RUID) const { return RegUnits[RUID]; } in getRegUnit()
DRegisterInfoEmitter.cpp205 const RegUnit &RU = RegBank.getRegUnit(UnitIdx); in EmitRegUnitPressure()
DCodeGenRegisters.cpp561 const RegUnit &RU = RegBank.getRegUnit(RegUnits[rui]); in computeOverlaps()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h384 bool hasRegUnit(unsigned Reg, unsigned RegUnit) const { in hasRegUnit() argument
386 if (*Units == RegUnit) in hasRegUnit()
588 virtual unsigned getRegUnitWeight(unsigned RegUnit) const = 0;
607 virtual const int *getRegUnitPressureSets(unsigned RegUnit) const = 0;
/external/llvm/include/llvm/CodeGen/
DLiveRegMatrix.h139 LiveIntervalUnion::Query &query(LiveInterval &VirtReg, unsigned RegUnit);
DMachineRegisterInfo.h382 void setRegUnitUsed(unsigned RegUnit) { in setRegUnitUsed() argument
383 UsedRegUnits.set(RegUnit); in setRegUnitUsed()