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Searched refs:addRegMask (Results 1 – 6 of 6) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h149 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { in addRegMask() function
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp377 MIB.addRegMask(RM->getRegMask()); in AddOperand()
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp2278 MIB.addRegMask(TRI.getCallPreservedMask(CC)); in ARMEmitLibcall()
2422 MIB.addRegMask(TRI.getCallPreservedMask(CC)); in SelectCall()
DARMISelLowering.cpp6397 MIB.addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp1965 MIB.addRegMask(TRI.getCallPreservedMask(CS.getCallingConv())); in DoSelectCall()
DX86ISelLowering.cpp14074 .addRegMask(RegMask) in EmitLoweredSegAlloca()
14083 .addRegMask(RegMask) in EmitLoweredSegAlloca()
14197 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
14208 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
14219 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()
14337 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()