Home
last modified time | relevance | path

Searched refs:getImplicitDefs (Results 1 – 8 of 8) sorted by relevance

/external/llvm/include/llvm/MC/
DMCInstrDesc.h492 const uint16_t *getImplicitDefs() const { in getImplicitDefs() function
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp722 bool HasPhysRegOuts = NumResults > II.getNumDefs() && II.getImplicitDefs()!=0; in EmitMachineNode()
782 unsigned Reg = II.getImplicitDefs()[i - II.getNumDefs()]; in EmitMachineNode()
817 if (!UsedRegs.empty() || II.getImplicitDefs()) in EmitMachineNode()
DScheduleDAGFast.cpp438 for (const uint16_t *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()
516 for (const uint16_t *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) { in DelayForLiveRegsBottomUp()
DScheduleDAGRRList.cpp1195 for (const uint16_t *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()
1321 for (const uint16_t *Reg = MCID.getImplicitDefs(); *Reg; ++Reg) in DelayForLiveRegsBottomUp()
2713 = TII->get(SU->getNode()->getMachineOpcode()).getImplicitDefs(); in canClobberReachingPhysRegUse()
2750 const uint16_t *ImpDefs = TII->get(N->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()
2757 TII->get(SUNode->getMachineOpcode()).getImplicitDefs(); in canClobberPhysRegDefs()
DScheduleDAGSDNodes.cpp448 TII->get(N->getMachineOpcode()).getImplicitDefs()) { in AddSchedEdges()
/external/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp204 for (const uint16_t *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef()
/external/llvm/lib/CodeGen/
DRegAllocFast.cpp1101 if (const uint16_t *Defs = (*I)->getImplicitDefs()) in runOnMachineFunction()
DMachineInstr.cpp522 for (const uint16_t *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; ++ImpDefs) in addImplicitDefUseOperands()