| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 73 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
117 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getDirectBrEncoding()
139 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getCondBrEncoding()
150 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getHA16Encoding()
161 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups); in getLO16Encoding()
174 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 16; in getMemRIEncoding()
178 return (getMachineOpValue(MI, MO, Fixups) & 0xFFFF) | RegBits; in getMemRIEncoding()
196 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 14; in getMemRIXEncoding()
200 return (getMachineOpValue(MI, MO, Fixups) & 0x3FFF) | RegBits; in getMemRIXEncoding()
216 if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups); in getTLSRegEncoding()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCCodeEmitter.cpp | 60 unsigned getMachineOpValue(const MachineInstr &MI,
184 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getDirectBrEncoding()
200 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getHA16Encoding()
209 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO); in getLO16Encoding()
220 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 16; in getMemRIEncoding()
224 return (getMachineOpValue(MI, MO) & 0xFFFF) | RegBits; in getMemRIEncoding()
236 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 14; in getMemRIXEncoding()
240 return (getMachineOpValue(MI, MO) & 0x3FFF) | RegBits; in getMemRIXEncoding()
254 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI, in getMachineOpValue() function in PPCCodeEmitter
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 154 unsigned getMachineOpValue(const MachineInstr &MI,
156 unsigned getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const { in getMachineOpValue() function in __anonee9ea9320111::ARMCodeEmitter
157 return getMachineOpValue(MI, MI.getOperand(OpIdx)); in getMachineOpValue()
471 unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI, in getMachineOpValue() function in ARMCodeEmitter
754 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi32immInstruction()
769 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi32immInstruction()
792 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi2piecesInstruction()
807 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift; in emitMOVi2piecesInstruction()
810 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRnShift; in emitMOVi2piecesInstruction()
832 Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift; in emitLEApcrelInstruction()
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 81 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
196 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
314 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups) << 16; in getMemEncoding()
315 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups); in getMemEncoding()
324 unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups); in getSizeExtEncoding()
335 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups); in getSizeInsEncoding()
336 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups); in getSizeInsEncoding()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsCodeEmitter.cpp | 102 unsigned getMachineOpValue(const MachineInstr &MI,
197 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16; in getMemEncoding()
198 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits; in getMemEncoding()
204 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; in getSizeExtEncoding()
210 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) + in getSizeInsEncoding()
211 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; in getSizeInsEncoding()
216 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI, in getMachineOpValue() function in MipsCodeEmitter
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| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| D | MBlazeMCCodeEmitter.cpp | 50 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
51 unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const { in getMachineOpValue() function in __anon355e539d0111::MBlazeMCCodeEmitter
52 return getMachineOpValue(MI, MI.getOperand(OpIdx)); in getMachineOpValue()
109 unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in MBlazeMCCodeEmitter
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| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| D | AMDGPUMCCodeEmitter.h | 32 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
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| D | SIMCCodeEmitter.cpp | 63 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
171 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
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| D | R600MCCodeEmitter.cpp | 59 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
513 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 89 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
345 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in AArch64MCCodeEmitter
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
406 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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