Searched refs:getSORegOpc (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() function
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 492 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
519 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
1253 Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal)); in SelectT2ShifterOperandReg()
2245 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), in SelectV6T2BitfieldExtractOp()
2657 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
2673 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
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| D | ARMExpandPseudoInsts.cpp | 830 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? in ExpandMI()
843 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) in ExpandMI()
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| D | ARMFastISel.cpp | 2718 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
2721 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); in SelectShift()
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| D | ARMBaseInstrInfo.cpp | 179 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
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| D | ARMISelLowering.cpp | 6445 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
6585 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1488 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
1499 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); in addRegShiftedImmOperands()
6939 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, 0); in processInstruction()
6970 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, Amt); in processInstruction()
6984 unsigned Shifter = ARM_AM::getSORegOpc(ARM_AM::rrx, 0); in processInstruction()
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