| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 237 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT() function in MVT
257 getVT(VTy->getElementType(), false), VTy->getNumElements()); in getVT()
268 return MVT::getVT(Ty, HandleUnknown); in getEVT()
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| /external/llvm/utils/TableGen/ |
| D | DAGISelMatcherEmitter.cpp | 422 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", "; in EmitMatcher()
431 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", " in EmitMatcher()
442 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher()
446 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher()
515 OS << getEnumName(EN->getVT(i)) << ", "; in EmitMatcher()
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| D | DAGISelMatcher.h | 776 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
801 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
827 MVT::SimpleValueType getVT() const { return VT; } in getVT() function
980 MVT::SimpleValueType getVT(unsigned i) const { in getVT() function
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 733 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits()
931 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits()
1282 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT(); in SimplifySetCC()
1386 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1) in SimplifySetCC()
2138 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true); in ParseConstraints()
2145 OpInfo.ConstraintVT = MVT::getVT(OpTy, true); in ParseConstraints()
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| D | LegalizeVectorOps.cpp | 252 QueryType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp()
641 EVT OrigTy = cast<VTSDNode>(Op->getOperand(1))->getVT(); in ExpandSEXTINREG()
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| D | SelectionDAG.cpp | 673 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps()
1873 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in ComputeMaskedBits()
1989 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in ComputeMaskedBits()
2139 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits()
2142 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits()
2157 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits(); in ComputeNumSignBits()
2934 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
2946 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. in getNode()
2958 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
2970 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode()
[all …]
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| D | SelectionDAGDumper.cpp | 444 OS << ":" << N->getVT().getEVTString(); in print_details()
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| D | SelectionDAGISel.cpp | 2075 if (cast<VTSDNode>(N)->getVT() == VT) in CheckValueType()
2079 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI.getPointerTy(); in CheckValueType()
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| D | LegalizeVectorTypes.cpp | 235 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp()
732 GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT(), LoVT, HiVT); in SplitVecRes_InregOp()
1713 cast<VTSDNode>(N->getOperand(1))->getVT() in WidenVecRes_InregOp()
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| D | LegalizeIntegerTypes.cpp | 1663 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertSext()
1684 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_AssertZext()
2200 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ExpandIntRes_SIGN_EXTEND_INREG()
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| D | LegalizeDAG.cpp | 1176 EVT InnerType = cast<VTSDNode>(Node->getOperand(1))->getVT(); in LegalizeOp()
2875 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
2896 EVT ExtraVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandNode()
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| D | DAGCombiner.cpp | 5045 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in ReduceLoadWidth()
5189 EVT EVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG()
5203 EVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) { in visitSIGN_EXTEND_INREG()
6517 EVT EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in visitFP_ROUND_INREG()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 541 static MVT getVT(Type *Ty, bool HandleUnknown = false);
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| D | SelectionDAGNodes.h | 1580 EVT getVT() const { return ValueType; }
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| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 336 EVT BVT = BaseType->getVT(); in LowerSIGN_EXTEND_INREG()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 584 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>;
585 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 862 if (cast<VTSDNode>(N001)->getVT() == MVT::i16) { in SelectSelect()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6529 if (cast<VTSDNode>(Op.getOperand(2))->getVT() == MVT::i16) in computeMaskedBitsForTargetNode()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 11788 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG()
17195 EVT ExtraVT = cast<VTSDNode>(N1)->getVT(); in PerformSIGN_EXTEND_INREGCombine()
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