/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeFloatTypes.cpp | 123 N->getValueType(0)), in SoftenFloatRes_BUILD_PAIR() 131 N->getValueType(0))); in SoftenFloatRes_ConstantFP() 137 NewOp.getValueType().getVectorElementType(), in SoftenFloatRes_EXTRACT_VECTOR_ELT() 142 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FABS() 154 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FADD() 157 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), in SoftenFloatRes_FADD() 167 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in SoftenFloatRes_FCEIL() 169 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0), in SoftenFloatRes_FCEIL() 183 EVT LVT = LHS.getValueType(); in SoftenFloatRes_FCOPYSIGN() 184 EVT RVT = RHS.getValueType(); in SoftenFloatRes_FCOPYSIGN() [all …]
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D | LegalizeVectorTypes.cpp | 132 LHS.getValueType(), LHS, RHS); in ScalarizeVecRes_BinOp() 140 Op0.getValueType(), Op0, Op1, Op2); in ScalarizeVecRes_TernaryOp() 150 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BITCAST() 156 EVT EltVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_BUILD_VECTOR() 166 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_CONVERT_RNDSAT() 169 Op0, DAG.getValueType(NewVT), in ScalarizeVecRes_CONVERT_RNDSAT() 170 DAG.getValueType(Op0.getValueType()), in ScalarizeVecRes_CONVERT_RNDSAT() 178 N->getValueType(0).getVectorElementType(), in ScalarizeVecRes_EXTRACT_SUBVECTOR() 183 EVT NewVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_FP_ROUND() 192 Op.getValueType(), Op, N->getOperand(1)); in ScalarizeVecRes_FPOWI() [all …]
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D | LegalizeIntegerTypes.cpp | 40 if (CustomLowerNode(N, N->getValueType(ResNo), true)) in PromoteIntegerResult() 157 Op.getValueType(), Op, N->getOperand(1)); in PromoteIntRes_AssertSext() 164 Op.getValueType(), Op, N->getOperand(1)); in PromoteIntRes_AssertZext() 168 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in PromoteIntRes_Atomic0() 208 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST() 210 EVT OutVT = N->getValueType(0); in PromoteIntRes_BITCAST() 265 EVT OVT = N->getValueType(0); in PromoteIntRes_BSWAP() 266 EVT NVT = Op.getValueType(); in PromoteIntRes_BSWAP() 279 N->getValueType(0)), JoinIntegers(N->getOperand(0), in PromoteIntRes_BUILD_PAIR() 284 EVT VT = N->getValueType(0); in PromoteIntRes_Constant() [all …]
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D | LegalizeTypesGeneric.cpp | 40 EVT OutVT = N->getValueType(0); in ExpandRes_BITCAST() 43 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() 134 LHS.getValueType().getSizeInBits() << 1), in ExpandRes_BITCAST() 169 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandRes_BITCAST() 195 assert(Part.getValueType() == N->getValueType(0) && in ExpandRes_EXTRACT_ELEMENT() 204 unsigned OldElts = OldVec.getValueType().getVectorNumElements(); in ExpandRes_EXTRACT_VECTOR_ELT() 205 EVT OldEltVT = OldVec.getValueType().getVectorElementType(); in ExpandRes_EXTRACT_VECTOR_ELT() 210 EVT OldVT = N->getValueType(0); in ExpandRes_EXTRACT_VECTOR_ELT() 231 if (Idx.getValueType().bitsLT(TLI.getPointerTy())) in ExpandRes_EXTRACT_VECTOR_ELT() 234 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); in ExpandRes_EXTRACT_VECTOR_ELT() [all …]
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D | LegalizeTypes.cpp | 129 } else if (isTypeLegal(Res.getValueType()) || IgnoreNodeResults(I)) { in PerformExpensiveChecks() 223 EVT ResultVT = N->getValueType(i); in run() 274 EVT OpVT = N->getOperand(i).getValueType(); in run() 409 if (!isTypeLegal(I->getValueType(i))) { in run() 417 !isTypeLegal(I->getOperand(i).getValueType())) { in run() 730 assert(Result.getValueType() == in SetPromotedInteger() 731 TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) && in SetPromotedInteger() 741 assert(Result.getValueType() == in SetSoftenedFloat() 742 TLI.getTypeToTransformTo(*DAG.getContext(), Op.getValueType()) && in SetSoftenedFloat() 755 assert(Result.getValueType().getSizeInBits() >= in SetScalarizedVector() [all …]
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D | LegalizeDAG.cpp | 258 EVT VT = CFP->getValueType(0); in ExpandConstantFP() 308 EVT VT = Val.getValueType(); in ExpandUnalignedStore() 359 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandUnalignedStore() 361 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); in ExpandUnalignedStore() 398 TLI.getShiftAmountTy(Val.getValueType())); in ExpandUnalignedStore() 407 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, in ExpandUnalignedStore() 429 EVT VT = LD->getValueType(0); in ExpandUnalignedLoad() 479 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); in ExpandUnalignedLoad() 480 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, in ExpandUnalignedLoad() 536 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, in ExpandUnalignedLoad() [all …]
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D | TargetLowering.cpp | 80 Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext()); in makeLibCall() 195 NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS); in softenSetCCOperands() 282 EVT VT = Op.getValueType(); in ShrinkDemandedConstant() 325 if (TLI.isTruncateFree(Op.getValueType(), SmallVT) && in ShrinkDemandedOp() 326 TLI.isZExtFree(SmallVT, Op.getValueType())) { in ShrinkDemandedOp() 335 dl, Op.getValueType(), X); in ShrinkDemandedOp() 356 assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth && in SimplifyDemandedBits() 378 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType())); in SimplifyDemandedBits() 426 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType())); in SimplifyDemandedBits() 497 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(), in SimplifyDemandedBits() [all …]
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D | LegalizeVectorOps.cpp | 249 QueryType = Node->getValueType(0); in LegalizeOp() 256 QueryType = Node->getOperand(0).getValueType(); in LegalizeOp() 327 if (Op.getOperand(j).getValueType().isVector()) in PromoteVectorOp() 341 EVT VT = Op.getOperand(0).getValueType(); in PromoteVectorOpINT_TO_FP() 366 if (Op.getOperand(j).getValueType().isVector()) in PromoteVectorOpINT_TO_FP() 372 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), &Operands[0], in PromoteVectorOpINT_TO_FP() 390 EVT DstEltVT = Op.getNode()->getValueType(0).getScalarType(); in ExpandLoad() 434 BasePTR = DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR, in ExpandLoad() 496 Op.getNode()->getValueType(0).getScalarType(), in ExpandLoad() 502 BasePTR = DAG.getNode(ISD::ADD, dl, BasePTR.getValueType(), BasePTR, in ExpandLoad() [all …]
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D | DAGCombiner.cpp | 138 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits(); in SimplifyDemandedBits() 422 !TLI.isOperationLegalOrCustom(ISD::FSUB, Op.getValueType())) in isNegatibleForFree() 475 return DAG.getConstantFP(V, Op.getValueType()); in GetNegatedExpression() 485 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 490 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 504 return DAG.getNode(ISD::FSUB, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 515 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 521 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 528 return DAG.getNode(Op.getOpcode(), Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() 532 return DAG.getNode(ISD::FP_ROUND, Op.getDebugLoc(), Op.getValueType(), in GetNegatedExpression() [all …]
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D | SelectionDAG.cpp | 123 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); in isBuildVectorAllOnes() 473 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements(); in AddNodeIDCustom() 530 if (N->getValueType(0) == MVT::Glue) in doNotCSE() 542 if (N->getValueType(i) == MVT::Glue) in doNotCSE() 693 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue && in RemoveNodeFromCSEMaps() 793 EVT VT = N->getValueType(0); in VerifyNodeCommon() 798 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() && in VerifyNodeCommon() 800 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() && in VerifyNodeCommon() 808 assert(N->getValueType(0).isVector() && "Wrong return type!"); in VerifyNodeCommon() 809 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() && in VerifyNodeCommon() [all …]
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D | SelectionDAGBuilder.cpp | 157 DAG.getConstant(Lo.getValueType().getSizeInBits(), in getCopyFromParts() 182 EVT PartEVT = Val.getValueType(); in getCopyFromParts() 194 DAG.getValueType(ValueVT)); in getCopyFromParts() 202 if (ValueVT.bitsLT(Val.getValueType())) in getCopyFromParts() 269 EVT PartEVT = Val.getValueType(); in getCopyFromPartsVector() 341 EVT ValueVT = Val.getValueType(); in getCopyToParts() 393 ValueVT = Val.getValueType(); in getCopyToParts() 472 EVT ValueVT = Val.getValueType(); in getCopyToPartsVector() 746 RegisterVT, P, DAG.getValueType(FromVT)); in getCopyFromRegs() 1055 EVT VT = TLI.getValueType(V->getType(), true); in getValueImpl() [all …]
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D | SelectionDAGISel.cpp | 542 if (N->getOperand(i).getValueType() == MVT::Other) in ComputeLiveOutVRegInfo() 555 EVT SrcVT = Src.getValueType(); in ComputeLiveOutVRegInfo() 1502 if (InOps[e-1].getValueType() == MVT::Glue) in SelectInlineAsmMemoryOperands() 1572 if (Use->getOperand(i).getValueType() == MVT::Other && IgnoreChains) in findNonImmUse() 1649 EVT VT = Root->getValueType(Root->getNumValues()-1); in IsLegalToFold() 1655 VT = Root->getValueType(Root->getNumValues()-1); in IsLegalToFold() 1681 return CurDAG->SelectNodeTo(N, TargetOpcode::IMPLICIT_DEF,N->getValueType(0)); in Select_UNDEF() 1732 if (ChainVal.getValueType() == MVT::Glue) in UpdateChainsAndGlue() 1734 assert(ChainVal.getValueType() == MVT::Other && "Not a chain?"); in UpdateChainsAndGlue() 1755 assert(FRN->getValueType(FRN->getNumValues()-1) == MVT::Glue && in UpdateChainsAndGlue() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86SelectionDAGInfo.cpp | 143 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemset() 149 EVT CVT = Count.getValueType(); in EmitTargetCodeForMemset() 157 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag }; in EmitTargetCodeForMemset() 162 EVT AddrVT = Dst.getValueType(); in EmitTargetCodeForMemset() 163 EVT SizeVT = Size.getValueType(); in EmitTargetCodeForMemset() 245 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemcpy() 254 EVT DstVT = Dst.getValueType(); in EmitTargetCodeForMemcpy() 255 EVT SrcVT = Src.getValueType(); in EmitTargetCodeForMemcpy() 256 EVT SizeVT = Size.getValueType(); in EmitTargetCodeForMemcpy()
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D | X86ISelLowering.cpp | 68 EVT VT = Vec.getValueType(); in Extract128BitVector() 112 EVT VT = Vec.getValueType(); in Insert128BitVector() 116 EVT ResultVT = Result.getValueType(); in Insert128BitVector() 1620 EVT ValVT = ValToCopy.getValueType(); in LowerReturn() 1722 if (Copy->getOperand(Copy->getNumOperands()-1).getValueType() == MVT::Glue) in isUsedByReturnOnly() 2023 DAG.getValueType(VA.getValVT())); in LowerFormalArguments() 2026 DAG.getValueType(VA.getValVT())); in LowerFormalArguments() 2655 RegsToPass[i].second.getValueType())); in LowerCall() 2771 unsigned Bytes = Arg.getValueType().getSizeInBits() / 8; in MatchingStackOffset() 3198 RHS = DAG.getConstant(0, RHS.getValueType()); in TranslateX86CC() [all …]
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeISelDAGToDAG.cpp | 106 if (N->getValueType(0) == MVT::i32) in isIntS32Immediate() 158 Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType()); in SelectAddrRegImm() 167 Disp = CurDAG->getTargetConstant(Imm, CN->getValueType(0)); in SelectAddrRegImm() 168 Base = CurDAG->getRegister(MBlaze::R0, CN->getValueType(0)); in SelectAddrRegImm() 174 Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType()); in SelectAddrRegImm() 211 EVT VT = Node->getValueType(0); in Select()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 672 assert(N->getValueType(0) == MVT::v16i8 && in isVMerge() 710 assert(N->getValueType(0) == MVT::v16i8 && in isVSLDOIShuffleMask() 746 assert(N->getValueType(0) == MVT::v16i8 && in isSplatShuffleMask() 875 assert(CN->getValueType(0) == MVT::f32 && "Only one legal FP vector type!"); in get_VSPLTI_elt() 921 if (N->getValueType(0) == MVT::i32) in isIntS16Immediate() 992 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); in SelectAddressRegImm() 1033 Disp = DAG.getTargetConstant(Imm, CN->getValueType(0)); in SelectAddressRegImm() 1035 CN->getValueType(0)); in SelectAddressRegImm() 1040 if (CN->getValueType(0) == MVT::i32 || in SelectAddressRegImm() 1048 unsigned Opc = CN->getValueType(0) == MVT::i32 ? PPC::LIS : PPC::LIS8; in SelectAddressRegImm() [all …]
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D | PPCISelDAGToDAG.cpp | 292 if (N->getValueType(0) == MVT::i32) in isIntS16Immediate() 306 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i32) { in isInt32Immediate() 316 if (N->getOpcode() == ISD::Constant && N->getValueType(0) == MVT::i64) { in isInt64Immediate() 364 if (N->getValueType(0) != MVT::i32) in isRotateAndMask() 479 if (LHS.getValueType() == MVT::i32) { in SelectCC() 520 } else if (LHS.getValueType() == MVT::i64) { in SelectCC() 563 } else if (LHS.getValueType() == MVT::f32) { in SelectCC() 566 assert(LHS.getValueType() == MVT::f64 && "Unknown vt!"); in SelectCC() 803 if (LHS.getValueType().isVector()) { in SelectSETCC() 804 EVT VecVT = LHS.getValueType(); in SelectSETCC() [all …]
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/external/smali/dexlib/src/main/java/org/jf/dexlib/EncodedValue/ |
D | EncodedValue.java | 94 int comp = getValueType().compareTo(o.getValueType()); in compareTo() 112 public abstract ValueType getValueType(); in getValueType() method in EncodedValue
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelDAGToDAG.cpp | 366 LD->getValueType(0), in SelectBaseOffsetLoad() 397 N1.getNode()->getValueType(0) == MVT::i32) { in SelectIndexedLoadSignExtend64() 461 N1.getNode()->getValueType(0) == MVT::i32) { in SelectIndexedLoadZeroExtend64() 562 if (LD->getValueType(0) == MVT::i64 && in SelectIndexedLoad() 566 if (LD->getValueType(0) == MVT::i64 && in SelectIndexedLoad() 574 LD->getValueType(0), in SelectIndexedLoad() 594 LD->getValueType(0), in SelectIndexedLoad() 716 !(Value.getValueType() == MVT::i64 && ST->isTruncatingStore())) { in SelectBaseOffsetStore() 783 if (N->getValueType(0) == MVT::i64) { in SelectMul() 794 if (Sext0.getNode()->getValueType(0) != MVT::i32) { in SelectMul() [all …]
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 1303 RegsToPass[i].second.getValueType())); in LowerCall() 1571 EVT VT = RHSC->getValueType(0); in getSelectableIntSetCC() 1694 DAG.getConstant(0, TheBit.getValueType()), in LowerBRCOND() 1712 if (LHS.getValueType() == MVT::f128) { in LowerBR_CC() 1720 RHS = DAG.getConstant(0, LHS.getValueType()); in LowerBR_CC() 1725 if (LHS.getValueType().isInteger()) { in LowerBR_CC() 1763 EVT ArgVT = Op.getOperand(i).getValueType(); in LowerF128ToCall() 1772 Type *RetTy = Op.getValueType().getTypeForEVT(*DAG.getContext()); in LowerF128ToCall() 1803 if (Op.getOperand(0).getValueType() != MVT::f128) { in LowerFP_ROUND() 1809 LC = RTLIB::getFPROUND(Op.getOperand(0).getValueType(), Op.getValueType()); in LowerFP_ROUND() [all …]
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D | AArch64ISelDAGToDAG.cpp | 164 uint32_t RegWidth = N.getValueType().getSizeInBits(); in SelectLogicalImm() 179 EVT DestType = Node->getValueType(0); in TrySelectToMoveImm() 231 EVT DestType = Node->getValueType(0); in SelectToLitPool() 280 EVT DestType = Node->getValueType(0); in LowerToFPLitPool() 342 SDValue CP = CurDAG->getTargetConstantPool(C, CN->getValueType(0)); in Select() 353 EVT Ty = Node->getValueType(0); in Select()
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/external/llvm/lib/Target/R600/ |
D | R600ISelLowering.cpp | 345 return DAG.getNode(AMDGPUISD::EXPORT, Op.getDebugLoc(), Op.getValueType(), in LowerOperation() 358 EVT VT = Op.getValueType(); in LowerOperation() 508 EVT VT = Op.getValueType(); in LowerROTL() 530 EVT VT = Op.getValueType(); in LowerSELECT_CC() 540 EVT CompareVT = LHS.getValueType(); in LowerSELECT_CC() 651 Op.getValueType(), in LowerSELECT() 681 return DAG.getNode(ISD::SRL, Ptr.getDebugLoc(), Ptr.getValueType(), Ptr, in stackPtrToRegIndex() 724 Ptr = DAG.getNode(AMDGPUISD::DWORDADDR, DL, Ptr.getValueType(), in LowerSTORE() 725 DAG.getNode(ISD::SRL, DL, Ptr.getValueType(), in LowerSTORE() 736 EVT ValueVT = Value.getValueType(); in LowerSTORE() [all …]
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
D | MemRegion.h | 493 virtual QualType getValueType() const = 0; 497 QualType T = getValueType(); in getLocationType() 501 return ctx.getPointerType(getValueType()); in getLocationType() 505 QualType T = getValueType(); in getDesugaredValueType() 742 QualType getValueType() const { in getValueType() function 778 QualType getValueType() const { in getValueType() function 810 QualType getValueType() const { in getValueType() function 866 QualType getValueType() const { in getValueType() function 897 QualType getValueType() const { in getValueType() function 920 QualType getValueType() const { in getValueType() function [all …]
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/external/llvm/utils/TableGen/ |
D | CallingConvEmitter.cpp | 90 O << "LocVT == " << getEnumName(getValueType(VT)); in EmitAction() 196 O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; in EmitAction() 205 O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; in EmitAction() 209 O << IndentStr << "LocVT = " << getEnumName(getValueType(DestTy)) <<";\n"; in EmitAction()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 358 DAG.getValueType(VA.getValVT())); in LowerCCCArguments() 361 DAG.getValueType(VA.getValVT())); in LowerCCCArguments() 574 RegsToPass[i].second.getValueType())); in LowerCCCCallTo() 627 EVT VT = Op.getValueType(); in LowerShifts() 700 assert(!LHS.getValueType().isFloatingPoint() && "We don't handle FP yet"); in EmitCMP() 727 RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); in EmitCMP() 740 RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); in EmitCMP() 753 RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); in EmitCMP() 766 RHS = DAG.getConstant(C->getSExtValue() + 1, C->getValueType(0)); in EmitCMP() 790 return DAG.getNode(MSP430ISD::BR_CC, dl, Op.getValueType(), in LowerBR_CC() [all …]
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