/external/valgrind/main/VEX/test/ |
D | test-i386.h | 28 inline void exec_opl(int s0, int s1, int iflags) in exec_opl() argument 32 flags = iflags; in exec_opl() 36 stringify(OP) "l", s0, res, iflags, flags & CC_MASK); in exec_opl() 39 res, iflags, flags & CC_MASK); in exec_opl() 42 inline void exec_opw(int s0, int s1, int iflags) in exec_opw() argument 46 flags = iflags; in exec_opw() 50 stringify(OP) "w", s0, res, iflags, flags & CC_MASK); in exec_opw() 53 res, iflags, flags & CC_MASK); in exec_opw() 56 inline void exec_opb(int s0, int s1, int iflags) in exec_opb() argument 60 flags = iflags; in exec_opb() [all …]
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D | test-amd64.h | 27 inline void exec_opq(int64 s0, int64 s1, int64 iflags) in exec_opq() argument 31 flags = iflags; in exec_opq() 34 stringify(OP) "q", s0, res, iflags, flags & CC_MASK); in exec_opq() 36 inline void exec_opl(int64 s0, int64 s1, int64 iflags) in exec_opl() argument 40 flags = iflags; in exec_opl() 43 stringify(OP) "l", s0, res, iflags, flags & CC_MASK); in exec_opl() 45 inline void exec_opw(int64 s0, int64 s1, int64 iflags) in exec_opw() argument 49 flags = iflags; in exec_opw() 52 stringify(OP) "w", s0, res, iflags, flags & CC_MASK); in exec_opw() 54 inline void exec_opb(int64 s0, int64 s1, int64 iflags) in exec_opb() argument [all …]
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D | test-amd64-shift.h | 30 void exec_opq(int64 s2, int64 s0, int64 s1, int64 iflags) in exec_opq() argument 34 flags = iflags; in exec_opq() 40 stringify(OP) "q", s0, s1, res, iflags, flags & CC_MASK); in exec_opq() 43 void exec_opl(int64 s2, int64 s0, int64 s1, int64 iflags) in exec_opl() argument 47 flags = iflags; in exec_opl() 53 stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK); in exec_opl() 56 void exec_opw(int64 s2, int64 s0, int64 s1, int64 iflags) in exec_opw() argument 60 flags = iflags; in exec_opw() 66 stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK); in exec_opw() 79 void exec_opl(int64 s2, int64 s0, int64 s1, int64 iflags) in exec_opl() argument [all …]
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D | test-i386-shift.h | 29 void exec_opl(int s2, int s0, int s1, int iflags) in exec_opl() argument 33 flags = iflags; in exec_opl() 39 stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK); in exec_opl() 42 void exec_opw(int s2, int s0, int s1, int iflags) in exec_opw() argument 46 flags = iflags; in exec_opw() 52 stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK); in exec_opw() 65 void exec_opl(int s2, int s0, int s1, int iflags) in exec_opl() argument 69 flags = iflags; in exec_opl() 75 stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK); in exec_opl() 78 void exec_opw(int s2, int s0, int s1, int iflags) in exec_opw() argument [all …]
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/external/iproute2/ip/ |
D | link_gre.c | 54 __u16 iflags = 0; in gre_parse_opt() local 107 iflags = *(__u16 *)RTA_DATA(greinfo[IFLA_GRE_IFLAGS]); in gre_parse_opt() 137 iflags |= GRE_KEY; in gre_parse_opt() 155 iflags |= GRE_KEY; in gre_parse_opt() 182 iflags |= GRE_SEQ; in gre_parse_opt() 185 iflags |= GRE_SEQ; in gre_parse_opt() 189 iflags |= GRE_CSUM; in gre_parse_opt() 192 iflags |= GRE_CSUM; in gre_parse_opt() 243 iflags |= GRE_KEY; in gre_parse_opt() 256 addattr_l(n, 1024, IFLA_GRE_IFLAGS, &iflags, 2); in gre_parse_opt() [all …]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-CPS3p-arm.txt | 3 # invalid (imod, M, iflags) combination
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/external/llvm/lib/Support/ |
D | regexec.c | 153 assert(!(g->iflags®EX_BAD)); in llvm_regexec() 154 if (g->iflags®EX_BAD) /* backstop for no-debug case */ in llvm_regexec()
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D | regcomp.c | 209 g->iflags = 0; in llvm_regcomp() 243 if (g->iflags®EX_BAD) in llvm_regcomp() 345 p->g->iflags |= USEBOL; in p_ere_exp() 351 p->g->iflags |= USEEOL; in p_ere_exp() 503 p->g->iflags |= USEBOL; in p_bre() 513 p->g->iflags |= USEEOL; in p_bre() 1486 g->iflags |= REGEX_BAD; in findmust() 1551 g->iflags |= REGEX_BAD; in pluscount()
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D | regex2.h | 138 int iflags; /* internal flags */ member
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/external/v8/src/ |
D | stub-cache.h | 337 uint32_t iflags = in PrimaryOffset() local 340 uint32_t key = (map_low32bits + field) ^ iflags; in PrimaryOffset() 353 uint32_t iflags = in SecondaryOffset() local 355 uint32_t key = (seed - string_low32bits) + iflags; in SecondaryOffset()
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/external/kernel-headers/original/asm-mips/ |
D | sgiarcs.h | 82 enum linux_identifier iflags; /* node flags */ member
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 296 def tCPS : T1I<(outs), (ins imod_op:$imod, iflags_op:$iflags), 297 NoItinerary, "cps$imod $iflags", []>, 301 bits<3> iflags; 305 let Inst{2-0} = iflags; 1400 // without any iflags. That's not, strictly speaking, valid syntax, but it's
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D | ARMInstrThumb2.td | 3400 bits<3> iflags; 3412 let Inst{7-5} = iflags; 3418 def t2CPS3p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 3419 "$imod.w\t$iflags, $mode">; 3421 def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags), 3422 "$imod.w\t$iflags">; 3423 let imod = 0, iflags = 0, M = 1 in
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D | ARMInstrInfo.td | 1688 bits<3> iflags; 1697 let Inst{8-6} = iflags; 1704 def CPS3p : CPS<(ins imod_op:$imod, iflags_op:$iflags, imm0_31:$mode), 1705 "$imod\t$iflags, $mode">; 1707 def CPS2p : CPS<(ins imod_op:$imod, iflags_op:$iflags), "$imod\t$iflags">; 1709 let imod = 0, iflags = 0, M = 1 in
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1887 unsigned iflags = fieldFromInstruction(Insn, 6, 3); in DecodeCPSInstruction() local 1902 Inst.addOperand(MCOperand::CreateImm(iflags)); in DecodeCPSInstruction() 1907 Inst.addOperand(MCOperand::CreateImm(iflags)); in DecodeCPSInstruction() 1912 if (iflags) S = MCDisassembler::SoftFail; in DecodeCPSInstruction() 1927 unsigned iflags = fieldFromInstruction(Insn, 5, 3); in DecodeT2CPSInstruction() local 1942 Inst.addOperand(MCOperand::CreateImm(iflags)); in DecodeT2CPSInstruction() 1947 Inst.addOperand(MCOperand::CreateImm(iflags)); in DecodeT2CPSInstruction() 1952 if (iflags) S = MCDisassembler::SoftFail; in DecodeT2CPSInstruction()
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/external/qemu/ |
D | cpu-exec.c | 492 && !(env->iflags & (D_FLAG | IMM_FLAG))) { in cpu_exec()
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