Home
last modified time | relevance | path

Searched refs:sllv (Results 1 – 25 of 26) sorted by relevance

12

/external/llvm/test/CodeGen/Mips/
Datomic.ll84 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
86 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
115 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
117 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
146 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
148 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
178 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
180 ; CHECK: sllv $[[R9:[0-9]+]], $4, $[[R4]]
208 ; CHECK: sllv $[[R6:[0-9]+]], $[[R5]], $[[R4]]
211 ; CHECK: sllv $[[R9:[0-9]+]], $[[R8]], $[[R4]]
[all …]
Dsll2.ll12 ; 16: sllv ${{[0-9]+}}, ${{[0-9]+}}
/external/valgrind/main/none/tests/mips32/
DMIPS32int.stdout.exp-mips32652 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x31415927, rt 0xffffffff
653 sllv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
654 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
655 sllv $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
656 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
657 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
658 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0xffffffff
659 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
660 sllv $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000
661 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
[all …]
DMIPS32int.stdout.exp-BE764 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x31415927, rt 0xffffffff
765 sllv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
766 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
767 sllv $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
768 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
769 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
770 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0xffffffff
771 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
772 sllv $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000
773 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
[all …]
DMIPS32int.stdout.exp764 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x31415927, rt 0xffffffff
765 sllv $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0xee00ee00
766 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
767 sllv $t0, $t1, $t2 :: rd 0xffffffff rs 0xffffffff, rt 0x00000000
768 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
769 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
770 sllv $t0, $t1, $t2 :: rd 0x00000000 rs 0x80000000, rt 0xffffffff
771 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
772 sllv $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x00000000
773 sllv $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x80000000
[all …]
/external/llvm/test/MC/Mips/
Dmips64-alu-instructions.s20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
47 sllv $2, $3, $5
Dmips-alu-instructions.s20 # CHECK: sllv $2, $3, $5 # encoding: [0x04,0x10,0xa3,0x00]
47 sllv $2, $3, $5
/external/v8/test/cctest/
Dtest-disasm-mips.cc234 COMPARE(sllv(a0, a1, a2), in TEST()
236 COMPARE(sllv(s0, s1, s2), in TEST()
238 COMPARE(sllv(t2, t3, t4), in TEST()
240 COMPARE(sllv(v0, v1, fp), in TEST()
Dtest-assembler-mips.cc162 __ sllv(v0, v0, t0); // 0xf2345600 in TEST() local
/external/kernel-headers/original/asm-mips/
Dasm.h263 #define INT_SLLV sllv
300 #define LONG_SLLV sllv
349 #define PTR_SLLV sllv
/external/llvm/test/MC/Disassembler/Mips/
Dmips32r2.txt357 # CHECK: sllv $2, $3, $5
Dmips32_le.txt336 # CHECK: sllv $2, $3, $5
Dmips32r2_le.txt357 # CHECK: sllv $2, $3, $5
Dmips32.txt336 # CHECK: sllv $2, $3, $5
/external/v8/src/mips/
Dcode-stubs-mips.cc507 __ sllv(source_, source_, zeros_); in Generate() local
730 __ sllv(scratch2, scratch2, dst1); in ConvertIntToDouble() local
743 __ sllv(dst1, int_scratch, scratch2); in ConvertIntToDouble() local
749 __ sllv(scratch2, int_scratch, scratch2); in ConvertIntToDouble() local
904 __ sllv(scratch2, scratch2, scratch3); in LoadNumberAsInt32() local
972 __ sllv(src1, src2, scratch); in DoubleIs32BitInteger() local
2517 __ sllv(scratch1, scratch1, scratch2); in GenerateSmiSmiOperation() local
2685 __ sllv(a2, a3, a2); in GenerateFPOperation() local
3090 __ sllv(a2, a3, a2); in GenerateInt32Stub() local
5098 __ sllv(t1, t0, a3); in Generate()
[all …]
Dassembler-mips.h733 void sllv(Register rd, Register rt, Register rs);
Dmacro-assembler-mips.cc756 sllv(at, rs, at); in Ror()
1495 sllv(input_high, input_high, scratch); in EmitOutOfInt32RangeTruncate()
1507 sllv(input_low, input_low, scratch); in EmitOutOfInt32RangeTruncate()
5157 sllv(mask_reg, t8, mask_reg); in GetMarkBits()
Dassembler-mips.cc1293 void Assembler::sllv(Register rd, Register rt, Register rs) { in sllv() function in v8::internal::Assembler
Dstub-cache-mips.cc981 __ sllv(ival, ival, zeros); in StoreIntAsFloat() local
4022 __ sllv(t3, t3, t6); in GenerateStoreExternalArray() local
Dfull-codegen-mips.cc1880 __ sllv(scratch1, scratch1, scratch2); in EmitInlineSmiBinaryOp() local
Dlithium-codegen-mips.cc1104 __ sllv(result, left, ToRegister(right_op)); in DoShiftI() local
/external/webkit/Source/JavaScriptCore/assembler/
DMIPSAssembler.h383 void sllv(RegisterID rd, RegisterID rt, int rs) in sllv() function
DMacroAssemblerMIPS.h260 m_assembler.sllv(dest, dest, shiftAmount); in lshift32()
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.td834 def SLLV : shift_rotate_reg<"sllv", CPURegsOpnd, shl>, SRLV_FM<4, 0>;
DMips16InstrInfo.td1069 def SllvRxRy16 : FRxRxRy16_ins<0b00100, "sllv", IIAlu>;

12