/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 238 bool isBranch() const { in isBranch() function 253 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch() 261 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch() 268 if (isBranch() || isCall() || isReturn() || isIndirectBranch()) in mayAffectControlFlow()
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D | MCInstrAnalysis.h | 31 virtual bool isBranch(const MCInst &Inst) const { in isBranch() function 32 return Info->get(Inst.getOpcode()).isBranch(); in isBranch()
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 189 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, in tryAddingSymbolicOperand() argument 207 if (isBranch) in tryAddingSymbolicOperand() 219 else if (isBranch) { in tryAddingSymbolicOperand() 224 if (!Name && !isBranch) in tryAddingSymbolicOperand() 318 bool isBranch = false; in translateImmediate() local 321 isBranch = true; in translateImmediate() 384 isBranch = true; in translateImmediate() 397 isBranch = true; in translateImmediate() 410 if(!tryAddingSymbolicOperand(immediate + pcrel, isBranch, insn.startLocation, in translateImmediate()
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/external/webkit/Source/JavaScriptCore/dfg/ |
D | DFGNode.h | 313 bool isBranch() in isBranch() function 320 ASSERT(isBranch() || isJump()); in takenBytecodeOffset() 326 ASSERT(isBranch()); in notTakenBytecodeOffset()
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D | DFGGraph.cpp | 113 if (node.isBranch() || node.isJump()) { in dump() 117 if (node.isBranch()) { in dump()
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/external/llvm/tools/llvm-objdump/ |
D | MCFunction.cpp | 58 if (Ana->isBranch(Inst)) { in createFunctionFromMC() 118 if (Ana->isBranch(Inst.Inst)) { in createFunctionFromMC()
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/external/llvm/lib/Target/X86/ |
D | X86InstrTSX.td | 23 let isBranch = 1, isTerminator = 1, Defs = [EAX] in
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D | X86InstrControl.td | 49 let isBarrier = 1, isBranch = 1, isTerminator = 1 in { 61 let isBranch = 1, isTerminator = 1, Uses = [EFLAGS] in { 88 let isBranch = 1, isTerminator = 1 in { 111 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.cpp | 162 if (MI->isBranch() && !MI->isBarrier()) in isUnpredicatedTerminator() 189 if (!I->isBranch()) in AnalyzeBranch()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 374 bool isBranch(QueryType Type = AnyInBundle) const { 389 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type); 397 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeDelaySlotFiller.cpp | 211 if (I->hasDelaySlot() || I->isBranch() || isDelayFiller(MBB,I) || in findDelayInstr()
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D | MBlazeInstrInfo.td | 486 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in { 491 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { 500 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1, 506 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, hasCtrlDep = 1 in { 515 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1, 521 let isBranch = 1, isTerminator = 1, hasDelaySlot = 1, hasCtrlDep = 1 in { 530 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1, 536 let isBranch = 1, isIndirectBranch = 1, isTerminator = 1,
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/external/llvm/utils/TableGen/ |
D | CodeGenInstruction.h | 219 bool isBranch; variable
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D | InstrInfoEmitter.cpp | 318 if (Inst.isBranch) OS << "|(1<<MCID::Branch)"; in emitRecord()
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/external/llvm/lib/Target/ARM/ |
D | Thumb2ITBlockPass.cpp | 198 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) { in InsertITInstructions()
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/external/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 307 if (MI.isBranch()) { in init() 542 assert((!I->isCall() && !I->isReturn() && !I->isBranch()) && in searchRange()
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D | MipsInstrInfo.td | 182 bit isBranch = 1; 506 let isBranch = 1; 516 let isBranch = 1; 551 let isBranch = 1; 566 let isBranch = 1; 603 let isBranch = 1;
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D | MipsCodeEmitter.cpp | 165 && MI.isBranch()) in getRelocation()
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D | Mips16InstrInfo.td | 457 bit isBranch = 1; 463 bit isBranch = 1; 670 let isBranch = 1; 684 let isBranch = 1; 692 let isBranch = 1; 699 let isBranch = 1;
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/external/llvm/lib/Target/XCore/ |
D | XCoreInstrInfo.td | 599 let isBranch = 1, isTerminator = 1 in { 625 let isBranch = 1, isTerminator = 1, isBarrier = 1 in { 653 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1, 920 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 925 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 930 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 1064 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
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/external/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 777 KillMI->isBranch() || KillMI->isTerminator()) in rescheduleMIBelowKill() 836 OtherMI->isBranch() || OtherMI->isTerminator()) in rescheduleMIBelowKill() 1017 OtherMI->isBranch() || OtherMI->isTerminator()) in rescheduleKillAboveMI()
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D | IfConversion.cpp | 585 if (!TIE->isBranch()) in ValidDiamond() 590 if (!FIE->isBranch()) in ValidDiamond() 1489 if (IgnoreBr && I->isBranch()) in CopyAndPredicateBlock()
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.cpp | 147 if (!I->isBranch()) in AnalyzeBranch()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64BranchFixupPass.cpp | 284 if (I->isBranch()) { in initializeFunctionInfo()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.td | 761 let isBranch = 1, isTerminator=1, isBarrier = 1, isPredicable = 1 in { 769 let isBranch = 1, isTerminator=1, Defs = [PC], 778 let isBranch = 1, isTerminator=1, neverHasSideEffects = 1, Defs = [PC], 786 let isTerminator = 1, isBranch = 1, neverHasSideEffects = 1, Defs = [PC], 795 let isBranch = 1, isTerminator=1, neverHasSideEffects = 1, Defs = [PC], 804 let isBranch = 1, isTerminator=1, neverHasSideEffects = 1, Defs = [PC], 813 let isBranch = 1, isTerminator=1, neverHasSideEffects = 1, Defs = [PC], 822 let isBranch = 1, isTerminator=1, neverHasSideEffects = 1, Defs = [PC], 1987 let isBranch = 1, isTerminator = 1, neverHasSideEffects = 1, 3060 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in [all …]
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