1 /*
2 * This file was generated automatically by gen-mterp.py for 'armv5te'.
3 *
4 * --> DO NOT EDIT <--
5 */
6
7 /* File: c/header.cpp */
8 /*
9 * Copyright (C) 2008 The Android Open Source Project
10 *
11 * Licensed under the Apache License, Version 2.0 (the "License");
12 * you may not use this file except in compliance with the License.
13 * You may obtain a copy of the License at
14 *
15 * http://www.apache.org/licenses/LICENSE-2.0
16 *
17 * Unless required by applicable law or agreed to in writing, software
18 * distributed under the License is distributed on an "AS IS" BASIS,
19 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
20 * See the License for the specific language governing permissions and
21 * limitations under the License.
22 */
23
24 /* common includes */
25 #include "Dalvik.h"
26 #include "interp/InterpDefs.h"
27 #include "mterp/Mterp.h"
28 #include <math.h> // needed for fmod, fmodf
29 #include "mterp/common/FindInterface.h"
30
31 /*
32 * Configuration defines. These affect the C implementations, i.e. the
33 * portable interpreter(s) and C stubs.
34 *
35 * Some defines are controlled by the Makefile, e.g.:
36 * WITH_INSTR_CHECKS
37 * WITH_TRACKREF_CHECKS
38 * EASY_GDB
39 * NDEBUG
40 */
41
42 #ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
43 # define CHECK_BRANCH_OFFSETS
44 # define CHECK_REGISTER_INDICES
45 #endif
46
47 /*
48 * Some architectures require 64-bit alignment for access to 64-bit data
49 * types. We can't just use pointers to copy 64-bit values out of our
50 * interpreted register set, because gcc may assume the pointer target is
51 * aligned and generate invalid code.
52 *
53 * There are two common approaches:
54 * (1) Use a union that defines a 32-bit pair and a 64-bit value.
55 * (2) Call memcpy().
56 *
57 * Depending upon what compiler you're using and what options are specified,
58 * one may be faster than the other. For example, the compiler might
59 * convert a memcpy() of 8 bytes into a series of instructions and omit
60 * the call. The union version could cause some strange side-effects,
61 * e.g. for a while ARM gcc thought it needed separate storage for each
62 * inlined instance, and generated instructions to zero out ~700 bytes of
63 * stack space at the top of the interpreter.
64 *
65 * The default is to use memcpy(). The current gcc for ARM seems to do
66 * better with the union.
67 */
68 #if defined(__ARM_EABI__)
69 # define NO_UNALIGN_64__UNION
70 #endif
71 /*
72 * MIPS ABI requires 64-bit alignment for access to 64-bit data types.
73 *
74 * Use memcpy() to do the transfer
75 */
76 #if defined(__mips__)
77 /* # define NO_UNALIGN_64__UNION */
78 #endif
79
80
81 //#define LOG_INSTR /* verbose debugging */
82 /* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
83
84 /*
85 * Export another copy of the PC on every instruction; this is largely
86 * redundant with EXPORT_PC and the debugger code. This value can be
87 * compared against what we have stored on the stack with EXPORT_PC to
88 * help ensure that we aren't missing any export calls.
89 */
90 #if WITH_EXTRA_GC_CHECKS > 1
91 # define EXPORT_EXTRA_PC() (self->currentPc2 = pc)
92 #else
93 # define EXPORT_EXTRA_PC()
94 #endif
95
96 /*
97 * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
98 *
99 * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
100 *
101 * We don't advance the program counter until we finish an instruction or
102 * branch, because we do want to have to unroll the PC if there's an
103 * exception.
104 */
105 #ifdef CHECK_BRANCH_OFFSETS
106 # define ADJUST_PC(_offset) do { \
107 int myoff = _offset; /* deref only once */ \
108 if (pc + myoff < curMethod->insns || \
109 pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
110 { \
111 char* desc; \
112 desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
113 ALOGE("Invalid branch %d at 0x%04x in %s.%s %s", \
114 myoff, (int) (pc - curMethod->insns), \
115 curMethod->clazz->descriptor, curMethod->name, desc); \
116 free(desc); \
117 dvmAbort(); \
118 } \
119 pc += myoff; \
120 EXPORT_EXTRA_PC(); \
121 } while (false)
122 #else
123 # define ADJUST_PC(_offset) do { \
124 pc += _offset; \
125 EXPORT_EXTRA_PC(); \
126 } while (false)
127 #endif
128
129 /*
130 * If enabled, log instructions as we execute them.
131 */
132 #ifdef LOG_INSTR
133 # define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
134 # define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
135 # define ILOG(_level, ...) do { \
136 char debugStrBuf[128]; \
137 snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
138 if (curMethod != NULL) \
139 ALOG(_level, LOG_TAG"i", "%-2d|%04x%s", \
140 self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
141 else \
142 ALOG(_level, LOG_TAG"i", "%-2d|####%s", \
143 self->threadId, debugStrBuf); \
144 } while(false)
145 void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
146 # define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
147 static const char kSpacing[] = " ";
148 #else
149 # define ILOGD(...) ((void)0)
150 # define ILOGV(...) ((void)0)
151 # define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
152 #endif
153
154 /* get a long from an array of u4 */
getLongFromArray(const u4 * ptr,int idx)155 static inline s8 getLongFromArray(const u4* ptr, int idx)
156 {
157 #if defined(NO_UNALIGN_64__UNION)
158 union { s8 ll; u4 parts[2]; } conv;
159
160 ptr += idx;
161 conv.parts[0] = ptr[0];
162 conv.parts[1] = ptr[1];
163 return conv.ll;
164 #else
165 s8 val;
166 memcpy(&val, &ptr[idx], 8);
167 return val;
168 #endif
169 }
170
171 /* store a long into an array of u4 */
putLongToArray(u4 * ptr,int idx,s8 val)172 static inline void putLongToArray(u4* ptr, int idx, s8 val)
173 {
174 #if defined(NO_UNALIGN_64__UNION)
175 union { s8 ll; u4 parts[2]; } conv;
176
177 ptr += idx;
178 conv.ll = val;
179 ptr[0] = conv.parts[0];
180 ptr[1] = conv.parts[1];
181 #else
182 memcpy(&ptr[idx], &val, 8);
183 #endif
184 }
185
186 /* get a double from an array of u4 */
getDoubleFromArray(const u4 * ptr,int idx)187 static inline double getDoubleFromArray(const u4* ptr, int idx)
188 {
189 #if defined(NO_UNALIGN_64__UNION)
190 union { double d; u4 parts[2]; } conv;
191
192 ptr += idx;
193 conv.parts[0] = ptr[0];
194 conv.parts[1] = ptr[1];
195 return conv.d;
196 #else
197 double dval;
198 memcpy(&dval, &ptr[idx], 8);
199 return dval;
200 #endif
201 }
202
203 /* store a double into an array of u4 */
putDoubleToArray(u4 * ptr,int idx,double dval)204 static inline void putDoubleToArray(u4* ptr, int idx, double dval)
205 {
206 #if defined(NO_UNALIGN_64__UNION)
207 union { double d; u4 parts[2]; } conv;
208
209 ptr += idx;
210 conv.d = dval;
211 ptr[0] = conv.parts[0];
212 ptr[1] = conv.parts[1];
213 #else
214 memcpy(&ptr[idx], &dval, 8);
215 #endif
216 }
217
218 /*
219 * If enabled, validate the register number on every access. Otherwise,
220 * just do an array access.
221 *
222 * Assumes the existence of "u4* fp".
223 *
224 * "_idx" may be referenced more than once.
225 */
226 #ifdef CHECK_REGISTER_INDICES
227 # define GET_REGISTER(_idx) \
228 ( (_idx) < curMethod->registersSize ? \
229 (fp[(_idx)]) : (assert(!"bad reg"),1969) )
230 # define SET_REGISTER(_idx, _val) \
231 ( (_idx) < curMethod->registersSize ? \
232 (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
233 # define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
234 # define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
235 # define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
236 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
237 # define GET_REGISTER_WIDE(_idx) \
238 ( (_idx) < curMethod->registersSize-1 ? \
239 getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
240 # define SET_REGISTER_WIDE(_idx, _val) \
241 ( (_idx) < curMethod->registersSize-1 ? \
242 (void)putLongToArray(fp, (_idx), (_val)) : assert(!"bad reg") )
243 # define GET_REGISTER_FLOAT(_idx) \
244 ( (_idx) < curMethod->registersSize ? \
245 (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
246 # define SET_REGISTER_FLOAT(_idx, _val) \
247 ( (_idx) < curMethod->registersSize ? \
248 (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
249 # define GET_REGISTER_DOUBLE(_idx) \
250 ( (_idx) < curMethod->registersSize-1 ? \
251 getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
252 # define SET_REGISTER_DOUBLE(_idx, _val) \
253 ( (_idx) < curMethod->registersSize-1 ? \
254 (void)putDoubleToArray(fp, (_idx), (_val)) : assert(!"bad reg") )
255 #else
256 # define GET_REGISTER(_idx) (fp[(_idx)])
257 # define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
258 # define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
259 # define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
260 # define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
261 # define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
262 # define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
263 # define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
264 # define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
265 # define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
266 # define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
267 # define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
268 #endif
269
270 /*
271 * Get 16 bits from the specified offset of the program counter. We always
272 * want to load 16 bits at a time from the instruction stream -- it's more
273 * efficient than 8 and won't have the alignment problems that 32 might.
274 *
275 * Assumes existence of "const u2* pc".
276 */
277 #define FETCH(_offset) (pc[(_offset)])
278
279 /*
280 * Extract instruction byte from 16-bit fetch (_inst is a u2).
281 */
282 #define INST_INST(_inst) ((_inst) & 0xff)
283
284 /*
285 * Replace the opcode (used when handling breakpoints). _opcode is a u1.
286 */
287 #define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode)
288
289 /*
290 * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
291 */
292 #define INST_A(_inst) (((_inst) >> 8) & 0x0f)
293 #define INST_B(_inst) ((_inst) >> 12)
294
295 /*
296 * Get the 8-bit "vAA" 8-bit register index from the instruction word.
297 * (_inst is u2)
298 */
299 #define INST_AA(_inst) ((_inst) >> 8)
300
301 /*
302 * The current PC must be available to Throwable constructors, e.g.
303 * those created by the various exception throw routines, so that the
304 * exception stack trace can be generated correctly. If we don't do this,
305 * the offset within the current method won't be shown correctly. See the
306 * notes in Exception.c.
307 *
308 * This is also used to determine the address for precise GC.
309 *
310 * Assumes existence of "u4* fp" and "const u2* pc".
311 */
312 #define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
313
314 /*
315 * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
316 * pc has already been exported to the stack.
317 *
318 * Perform additional checks on debug builds.
319 *
320 * Use this to check for NULL when the instruction handler calls into
321 * something that could throw an exception (so we have already called
322 * EXPORT_PC at the top).
323 */
checkForNull(Object * obj)324 static inline bool checkForNull(Object* obj)
325 {
326 if (obj == NULL) {
327 dvmThrowNullPointerException(NULL);
328 return false;
329 }
330 #ifdef WITH_EXTRA_OBJECT_VALIDATION
331 if (!dvmIsHeapAddress(obj)) {
332 ALOGE("Invalid object %p", obj);
333 dvmAbort();
334 }
335 #endif
336 #ifndef NDEBUG
337 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
338 /* probable heap corruption */
339 ALOGE("Invalid object class %p (in %p)", obj->clazz, obj);
340 dvmAbort();
341 }
342 #endif
343 return true;
344 }
345
346 /*
347 * Check to see if "obj" is NULL. If so, export the PC into the stack
348 * frame and throw an exception.
349 *
350 * Perform additional checks on debug builds.
351 *
352 * Use this to check for NULL when the instruction handler doesn't do
353 * anything else that can throw an exception.
354 */
checkForNullExportPC(Object * obj,u4 * fp,const u2 * pc)355 static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
356 {
357 if (obj == NULL) {
358 EXPORT_PC();
359 dvmThrowNullPointerException(NULL);
360 return false;
361 }
362 #ifdef WITH_EXTRA_OBJECT_VALIDATION
363 if (!dvmIsHeapAddress(obj)) {
364 ALOGE("Invalid object %p", obj);
365 dvmAbort();
366 }
367 #endif
368 #ifndef NDEBUG
369 if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
370 /* probable heap corruption */
371 ALOGE("Invalid object class %p (in %p)", obj->clazz, obj);
372 dvmAbort();
373 }
374 #endif
375 return true;
376 }
377
378 /* File: cstubs/stubdefs.cpp */
379 /*
380 * In the C mterp stubs, "goto" is a function call followed immediately
381 * by a return.
382 */
383
384 #define GOTO_TARGET_DECL(_target, ...) \
385 extern "C" void dvmMterp_##_target(Thread* self, ## __VA_ARGS__);
386
387 /* (void)xxx to quiet unused variable compiler warnings. */
388 #define GOTO_TARGET(_target, ...) \
389 void dvmMterp_##_target(Thread* self, ## __VA_ARGS__) { \
390 u2 ref, vsrc1, vsrc2, vdst; \
391 u2 inst = FETCH(0); \
392 const Method* methodToCall; \
393 StackSaveArea* debugSaveArea; \
394 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst; \
395 (void)methodToCall; (void)debugSaveArea;
396
397 #define GOTO_TARGET_END }
398
399 /*
400 * Redefine what used to be local variable accesses into Thread struct
401 * references. (These are undefined down in "footer.cpp".)
402 */
403 #define retval self->interpSave.retval
404 #define pc self->interpSave.pc
405 #define fp self->interpSave.curFrame
406 #define curMethod self->interpSave.method
407 #define methodClassDex self->interpSave.methodClassDex
408 #define debugTrackedRefStart self->interpSave.debugTrackedRefStart
409
410 /* ugh */
411 #define STUB_HACK(x) x
412 #if defined(WITH_JIT)
413 #define JIT_STUB_HACK(x) x
414 #else
415 #define JIT_STUB_HACK(x)
416 #endif
417
418 /*
419 * InterpSave's pc and fp must be valid when breaking out to a
420 * "Reportxxx" routine. Because the portable interpreter uses local
421 * variables for these, we must flush prior. Stubs, however, use
422 * the interpSave vars directly, so this is a nop for stubs.
423 */
424 #define PC_FP_TO_SELF()
425 #define PC_TO_SELF()
426
427 /*
428 * Opcode handler framing macros. Here, each opcode is a separate function
429 * that takes a "self" argument and returns void. We can't declare
430 * these "static" because they may be called from an assembly stub.
431 * (void)xxx to quiet unused variable compiler warnings.
432 */
433 #define HANDLE_OPCODE(_op) \
434 extern "C" void dvmMterp_##_op(Thread* self); \
435 void dvmMterp_##_op(Thread* self) { \
436 u4 ref; \
437 u2 vsrc1, vsrc2, vdst; \
438 u2 inst = FETCH(0); \
439 (void)ref; (void)vsrc1; (void)vsrc2; (void)vdst; (void)inst;
440
441 #define OP_END }
442
443 /*
444 * Like the "portable" FINISH, but don't reload "inst", and return to caller
445 * when done. Further, debugger/profiler checks are handled
446 * before handler execution in mterp, so we don't do them here either.
447 */
448 #if defined(WITH_JIT)
449 #define FINISH(_offset) { \
450 ADJUST_PC(_offset); \
451 if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
452 dvmCheckJit(pc, self); \
453 } \
454 return; \
455 }
456 #else
457 #define FINISH(_offset) { \
458 ADJUST_PC(_offset); \
459 return; \
460 }
461 #endif
462
463 #define FINISH_BKPT(_opcode) /* FIXME? */
464 #define DISPATCH_EXTENDED(_opcode) /* FIXME? */
465
466 /*
467 * The "goto label" statements turn into function calls followed by
468 * return statements. Some of the functions take arguments, which in the
469 * portable interpreter are handled by assigning values to globals.
470 */
471
472 #define GOTO_exceptionThrown() \
473 do { \
474 dvmMterp_exceptionThrown(self); \
475 return; \
476 } while(false)
477
478 #define GOTO_returnFromMethod() \
479 do { \
480 dvmMterp_returnFromMethod(self); \
481 return; \
482 } while(false)
483
484 #define GOTO_invoke(_target, _methodCallRange) \
485 do { \
486 dvmMterp_##_target(self, _methodCallRange); \
487 return; \
488 } while(false)
489
490 #define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) \
491 do { \
492 dvmMterp_invokeMethod(self, _methodCallRange, _methodToCall, \
493 _vsrc1, _vdst); \
494 return; \
495 } while(false)
496
497 /*
498 * As a special case, "goto bail" turns into a longjmp.
499 */
500 #define GOTO_bail() \
501 dvmMterpStdBail(self)
502
503 /*
504 * Periodically check for thread suspension.
505 *
506 * While we're at it, see if a debugger has attached or the profiler has
507 * started.
508 */
509 #define PERIODIC_CHECKS(_pcadj) { \
510 if (dvmCheckSuspendQuick(self)) { \
511 EXPORT_PC(); /* need for precise GC */ \
512 dvmCheckSuspendPending(self); \
513 } \
514 }
515
516 /* File: c/opcommon.cpp */
517 /* forward declarations of goto targets */
518 GOTO_TARGET_DECL(filledNewArray, bool methodCallRange);
519 GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange);
520 GOTO_TARGET_DECL(invokeSuper, bool methodCallRange);
521 GOTO_TARGET_DECL(invokeInterface, bool methodCallRange);
522 GOTO_TARGET_DECL(invokeDirect, bool methodCallRange);
523 GOTO_TARGET_DECL(invokeStatic, bool methodCallRange);
524 GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange);
525 GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange);
526 GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
527 u2 count, u2 regs);
528 GOTO_TARGET_DECL(returnFromMethod);
529 GOTO_TARGET_DECL(exceptionThrown);
530
531 /*
532 * ===========================================================================
533 *
534 * What follows are opcode definitions shared between multiple opcodes with
535 * minor substitutions handled by the C pre-processor. These should probably
536 * use the mterp substitution mechanism instead, with the code here moved
537 * into common fragment files (like the asm "binop.S"), although it's hard
538 * to give up the C preprocessor in favor of the much simpler text subst.
539 *
540 * ===========================================================================
541 */
542
543 #define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
544 HANDLE_OPCODE(_opcode /*vA, vB*/) \
545 vdst = INST_A(inst); \
546 vsrc1 = INST_B(inst); \
547 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
548 SET_REGISTER##_totype(vdst, \
549 GET_REGISTER##_fromtype(vsrc1)); \
550 FINISH(1);
551
552 #define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
553 _tovtype, _tortype) \
554 HANDLE_OPCODE(_opcode /*vA, vB*/) \
555 { \
556 /* spec defines specific handling for +/- inf and NaN values */ \
557 _fromvtype val; \
558 _tovtype intMin, intMax, result; \
559 vdst = INST_A(inst); \
560 vsrc1 = INST_B(inst); \
561 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
562 val = GET_REGISTER##_fromrtype(vsrc1); \
563 intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
564 intMax = ~intMin; \
565 result = (_tovtype) val; \
566 if (val >= intMax) /* +inf */ \
567 result = intMax; \
568 else if (val <= intMin) /* -inf */ \
569 result = intMin; \
570 else if (val != val) /* NaN */ \
571 result = 0; \
572 else \
573 result = (_tovtype) val; \
574 SET_REGISTER##_tortype(vdst, result); \
575 } \
576 FINISH(1);
577
578 #define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
579 HANDLE_OPCODE(_opcode /*vA, vB*/) \
580 vdst = INST_A(inst); \
581 vsrc1 = INST_B(inst); \
582 ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
583 SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
584 FINISH(1);
585
586 /* NOTE: the comparison result is always a signed 4-byte integer */
587 #define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
588 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
589 { \
590 int result; \
591 u2 regs; \
592 _varType val1, val2; \
593 vdst = INST_AA(inst); \
594 regs = FETCH(1); \
595 vsrc1 = regs & 0xff; \
596 vsrc2 = regs >> 8; \
597 ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
598 val1 = GET_REGISTER##_type(vsrc1); \
599 val2 = GET_REGISTER##_type(vsrc2); \
600 if (val1 == val2) \
601 result = 0; \
602 else if (val1 < val2) \
603 result = -1; \
604 else if (val1 > val2) \
605 result = 1; \
606 else \
607 result = (_nanVal); \
608 ILOGV("+ result=%d", result); \
609 SET_REGISTER(vdst, result); \
610 } \
611 FINISH(2);
612
613 #define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
614 HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
615 vsrc1 = INST_A(inst); \
616 vsrc2 = INST_B(inst); \
617 if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
618 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
619 ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
620 branchOffset); \
621 ILOGV("> branch taken"); \
622 if (branchOffset < 0) \
623 PERIODIC_CHECKS(branchOffset); \
624 FINISH(branchOffset); \
625 } else { \
626 ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
627 FINISH(2); \
628 }
629
630 #define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
631 HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
632 vsrc1 = INST_AA(inst); \
633 if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
634 int branchOffset = (s2)FETCH(1); /* sign-extended */ \
635 ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
636 ILOGV("> branch taken"); \
637 if (branchOffset < 0) \
638 PERIODIC_CHECKS(branchOffset); \
639 FINISH(branchOffset); \
640 } else { \
641 ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
642 FINISH(2); \
643 }
644
645 #define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
646 HANDLE_OPCODE(_opcode /*vA, vB*/) \
647 vdst = INST_A(inst); \
648 vsrc1 = INST_B(inst); \
649 ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
650 SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
651 FINISH(1);
652
653 #define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
654 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
655 { \
656 u2 srcRegs; \
657 vdst = INST_AA(inst); \
658 srcRegs = FETCH(1); \
659 vsrc1 = srcRegs & 0xff; \
660 vsrc2 = srcRegs >> 8; \
661 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
662 if (_chkdiv != 0) { \
663 s4 firstVal, secondVal, result; \
664 firstVal = GET_REGISTER(vsrc1); \
665 secondVal = GET_REGISTER(vsrc2); \
666 if (secondVal == 0) { \
667 EXPORT_PC(); \
668 dvmThrowArithmeticException("divide by zero"); \
669 GOTO_exceptionThrown(); \
670 } \
671 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
672 if (_chkdiv == 1) \
673 result = firstVal; /* division */ \
674 else \
675 result = 0; /* remainder */ \
676 } else { \
677 result = firstVal _op secondVal; \
678 } \
679 SET_REGISTER(vdst, result); \
680 } else { \
681 /* non-div/rem case */ \
682 SET_REGISTER(vdst, \
683 (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
684 } \
685 } \
686 FINISH(2);
687
688 #define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
689 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
690 { \
691 u2 srcRegs; \
692 vdst = INST_AA(inst); \
693 srcRegs = FETCH(1); \
694 vsrc1 = srcRegs & 0xff; \
695 vsrc2 = srcRegs >> 8; \
696 ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
697 SET_REGISTER(vdst, \
698 _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
699 } \
700 FINISH(2);
701
702 #define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
703 HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
704 vdst = INST_A(inst); \
705 vsrc1 = INST_B(inst); \
706 vsrc2 = FETCH(1); \
707 ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
708 (_opname), vdst, vsrc1, vsrc2); \
709 if (_chkdiv != 0) { \
710 s4 firstVal, result; \
711 firstVal = GET_REGISTER(vsrc1); \
712 if ((s2) vsrc2 == 0) { \
713 EXPORT_PC(); \
714 dvmThrowArithmeticException("divide by zero"); \
715 GOTO_exceptionThrown(); \
716 } \
717 if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
718 /* won't generate /lit16 instr for this; check anyway */ \
719 if (_chkdiv == 1) \
720 result = firstVal; /* division */ \
721 else \
722 result = 0; /* remainder */ \
723 } else { \
724 result = firstVal _op (s2) vsrc2; \
725 } \
726 SET_REGISTER(vdst, result); \
727 } else { \
728 /* non-div/rem case */ \
729 SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
730 } \
731 FINISH(2);
732
733 #define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
734 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
735 { \
736 u2 litInfo; \
737 vdst = INST_AA(inst); \
738 litInfo = FETCH(1); \
739 vsrc1 = litInfo & 0xff; \
740 vsrc2 = litInfo >> 8; /* constant */ \
741 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
742 (_opname), vdst, vsrc1, vsrc2); \
743 if (_chkdiv != 0) { \
744 s4 firstVal, result; \
745 firstVal = GET_REGISTER(vsrc1); \
746 if ((s1) vsrc2 == 0) { \
747 EXPORT_PC(); \
748 dvmThrowArithmeticException("divide by zero"); \
749 GOTO_exceptionThrown(); \
750 } \
751 if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
752 if (_chkdiv == 1) \
753 result = firstVal; /* division */ \
754 else \
755 result = 0; /* remainder */ \
756 } else { \
757 result = firstVal _op ((s1) vsrc2); \
758 } \
759 SET_REGISTER(vdst, result); \
760 } else { \
761 SET_REGISTER(vdst, \
762 (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
763 } \
764 } \
765 FINISH(2);
766
767 #define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
768 HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
769 { \
770 u2 litInfo; \
771 vdst = INST_AA(inst); \
772 litInfo = FETCH(1); \
773 vsrc1 = litInfo & 0xff; \
774 vsrc2 = litInfo >> 8; /* constant */ \
775 ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
776 (_opname), vdst, vsrc1, vsrc2); \
777 SET_REGISTER(vdst, \
778 _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
779 } \
780 FINISH(2);
781
782 #define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
783 HANDLE_OPCODE(_opcode /*vA, vB*/) \
784 vdst = INST_A(inst); \
785 vsrc1 = INST_B(inst); \
786 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
787 if (_chkdiv != 0) { \
788 s4 firstVal, secondVal, result; \
789 firstVal = GET_REGISTER(vdst); \
790 secondVal = GET_REGISTER(vsrc1); \
791 if (secondVal == 0) { \
792 EXPORT_PC(); \
793 dvmThrowArithmeticException("divide by zero"); \
794 GOTO_exceptionThrown(); \
795 } \
796 if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
797 if (_chkdiv == 1) \
798 result = firstVal; /* division */ \
799 else \
800 result = 0; /* remainder */ \
801 } else { \
802 result = firstVal _op secondVal; \
803 } \
804 SET_REGISTER(vdst, result); \
805 } else { \
806 SET_REGISTER(vdst, \
807 (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
808 } \
809 FINISH(1);
810
811 #define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
812 HANDLE_OPCODE(_opcode /*vA, vB*/) \
813 vdst = INST_A(inst); \
814 vsrc1 = INST_B(inst); \
815 ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
816 SET_REGISTER(vdst, \
817 _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
818 FINISH(1);
819
820 #define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
821 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
822 { \
823 u2 srcRegs; \
824 vdst = INST_AA(inst); \
825 srcRegs = FETCH(1); \
826 vsrc1 = srcRegs & 0xff; \
827 vsrc2 = srcRegs >> 8; \
828 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
829 if (_chkdiv != 0) { \
830 s8 firstVal, secondVal, result; \
831 firstVal = GET_REGISTER_WIDE(vsrc1); \
832 secondVal = GET_REGISTER_WIDE(vsrc2); \
833 if (secondVal == 0LL) { \
834 EXPORT_PC(); \
835 dvmThrowArithmeticException("divide by zero"); \
836 GOTO_exceptionThrown(); \
837 } \
838 if ((u8)firstVal == 0x8000000000000000ULL && \
839 secondVal == -1LL) \
840 { \
841 if (_chkdiv == 1) \
842 result = firstVal; /* division */ \
843 else \
844 result = 0; /* remainder */ \
845 } else { \
846 result = firstVal _op secondVal; \
847 } \
848 SET_REGISTER_WIDE(vdst, result); \
849 } else { \
850 SET_REGISTER_WIDE(vdst, \
851 (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
852 } \
853 } \
854 FINISH(2);
855
856 #define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
857 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
858 { \
859 u2 srcRegs; \
860 vdst = INST_AA(inst); \
861 srcRegs = FETCH(1); \
862 vsrc1 = srcRegs & 0xff; \
863 vsrc2 = srcRegs >> 8; \
864 ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
865 SET_REGISTER_WIDE(vdst, \
866 _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
867 } \
868 FINISH(2);
869
870 #define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
871 HANDLE_OPCODE(_opcode /*vA, vB*/) \
872 vdst = INST_A(inst); \
873 vsrc1 = INST_B(inst); \
874 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
875 if (_chkdiv != 0) { \
876 s8 firstVal, secondVal, result; \
877 firstVal = GET_REGISTER_WIDE(vdst); \
878 secondVal = GET_REGISTER_WIDE(vsrc1); \
879 if (secondVal == 0LL) { \
880 EXPORT_PC(); \
881 dvmThrowArithmeticException("divide by zero"); \
882 GOTO_exceptionThrown(); \
883 } \
884 if ((u8)firstVal == 0x8000000000000000ULL && \
885 secondVal == -1LL) \
886 { \
887 if (_chkdiv == 1) \
888 result = firstVal; /* division */ \
889 else \
890 result = 0; /* remainder */ \
891 } else { \
892 result = firstVal _op secondVal; \
893 } \
894 SET_REGISTER_WIDE(vdst, result); \
895 } else { \
896 SET_REGISTER_WIDE(vdst, \
897 (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
898 } \
899 FINISH(1);
900
901 #define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
902 HANDLE_OPCODE(_opcode /*vA, vB*/) \
903 vdst = INST_A(inst); \
904 vsrc1 = INST_B(inst); \
905 ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
906 SET_REGISTER_WIDE(vdst, \
907 _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
908 FINISH(1);
909
910 #define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
911 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
912 { \
913 u2 srcRegs; \
914 vdst = INST_AA(inst); \
915 srcRegs = FETCH(1); \
916 vsrc1 = srcRegs & 0xff; \
917 vsrc2 = srcRegs >> 8; \
918 ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
919 SET_REGISTER_FLOAT(vdst, \
920 GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
921 } \
922 FINISH(2);
923
924 #define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
925 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
926 { \
927 u2 srcRegs; \
928 vdst = INST_AA(inst); \
929 srcRegs = FETCH(1); \
930 vsrc1 = srcRegs & 0xff; \
931 vsrc2 = srcRegs >> 8; \
932 ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
933 SET_REGISTER_DOUBLE(vdst, \
934 GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
935 } \
936 FINISH(2);
937
938 #define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
939 HANDLE_OPCODE(_opcode /*vA, vB*/) \
940 vdst = INST_A(inst); \
941 vsrc1 = INST_B(inst); \
942 ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
943 SET_REGISTER_FLOAT(vdst, \
944 GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
945 FINISH(1);
946
947 #define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
948 HANDLE_OPCODE(_opcode /*vA, vB*/) \
949 vdst = INST_A(inst); \
950 vsrc1 = INST_B(inst); \
951 ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
952 SET_REGISTER_DOUBLE(vdst, \
953 GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
954 FINISH(1);
955
956 #define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
957 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
958 { \
959 ArrayObject* arrayObj; \
960 u2 arrayInfo; \
961 EXPORT_PC(); \
962 vdst = INST_AA(inst); \
963 arrayInfo = FETCH(1); \
964 vsrc1 = arrayInfo & 0xff; /* array ptr */ \
965 vsrc2 = arrayInfo >> 8; /* index */ \
966 ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
967 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
968 if (!checkForNull((Object*) arrayObj)) \
969 GOTO_exceptionThrown(); \
970 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
971 dvmThrowArrayIndexOutOfBoundsException( \
972 arrayObj->length, GET_REGISTER(vsrc2)); \
973 GOTO_exceptionThrown(); \
974 } \
975 SET_REGISTER##_regsize(vdst, \
976 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)]); \
977 ILOGV("+ AGET[%d]=%#x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
978 } \
979 FINISH(2);
980
981 #define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
982 HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
983 { \
984 ArrayObject* arrayObj; \
985 u2 arrayInfo; \
986 EXPORT_PC(); \
987 vdst = INST_AA(inst); /* AA: source value */ \
988 arrayInfo = FETCH(1); \
989 vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
990 vsrc2 = arrayInfo >> 8; /* CC: index */ \
991 ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
992 arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
993 if (!checkForNull((Object*) arrayObj)) \
994 GOTO_exceptionThrown(); \
995 if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
996 dvmThrowArrayIndexOutOfBoundsException( \
997 arrayObj->length, GET_REGISTER(vsrc2)); \
998 GOTO_exceptionThrown(); \
999 } \
1000 ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
1001 ((_type*)(void*)arrayObj->contents)[GET_REGISTER(vsrc2)] = \
1002 GET_REGISTER##_regsize(vdst); \
1003 } \
1004 FINISH(2);
1005
1006 /*
1007 * It's possible to get a bad value out of a field with sub-32-bit stores
1008 * because the -quick versions always operate on 32 bits. Consider:
1009 * short foo = -1 (sets a 32-bit register to 0xffffffff)
1010 * iput-quick foo (writes all 32 bits to the field)
1011 * short bar = 1 (sets a 32-bit register to 0x00000001)
1012 * iput-short (writes the low 16 bits to the field)
1013 * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
1014 * This can only happen when optimized and non-optimized code has interleaved
1015 * access to the same field. This is unlikely but possible.
1016 *
1017 * The easiest way to fix this is to always read/write 32 bits at a time. On
1018 * a device with a 16-bit data bus this is sub-optimal. (The alternative
1019 * approach is to have sub-int versions of iget-quick, but now we're wasting
1020 * Dalvik instruction space and making it less likely that handler code will
1021 * already be in the CPU i-cache.)
1022 */
1023 #define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
1024 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1025 { \
1026 InstField* ifield; \
1027 Object* obj; \
1028 EXPORT_PC(); \
1029 vdst = INST_A(inst); \
1030 vsrc1 = INST_B(inst); /* object ptr */ \
1031 ref = FETCH(1); /* field ref */ \
1032 ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1033 obj = (Object*) GET_REGISTER(vsrc1); \
1034 if (!checkForNull(obj)) \
1035 GOTO_exceptionThrown(); \
1036 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1037 if (ifield == NULL) { \
1038 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1039 if (ifield == NULL) \
1040 GOTO_exceptionThrown(); \
1041 } \
1042 SET_REGISTER##_regsize(vdst, \
1043 dvmGetField##_ftype(obj, ifield->byteOffset)); \
1044 ILOGV("+ IGET '%s'=0x%08llx", ifield->name, \
1045 (u8) GET_REGISTER##_regsize(vdst)); \
1046 } \
1047 FINISH(2);
1048
1049 #define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1050 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1051 { \
1052 Object* obj; \
1053 vdst = INST_A(inst); \
1054 vsrc1 = INST_B(inst); /* object ptr */ \
1055 ref = FETCH(1); /* field offset */ \
1056 ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
1057 (_opname), vdst, vsrc1, ref); \
1058 obj = (Object*) GET_REGISTER(vsrc1); \
1059 if (!checkForNullExportPC(obj, fp, pc)) \
1060 GOTO_exceptionThrown(); \
1061 SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
1062 ILOGV("+ IGETQ %d=0x%08llx", ref, \
1063 (u8) GET_REGISTER##_regsize(vdst)); \
1064 } \
1065 FINISH(2);
1066
1067 #define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
1068 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1069 { \
1070 InstField* ifield; \
1071 Object* obj; \
1072 EXPORT_PC(); \
1073 vdst = INST_A(inst); \
1074 vsrc1 = INST_B(inst); /* object ptr */ \
1075 ref = FETCH(1); /* field ref */ \
1076 ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
1077 obj = (Object*) GET_REGISTER(vsrc1); \
1078 if (!checkForNull(obj)) \
1079 GOTO_exceptionThrown(); \
1080 ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
1081 if (ifield == NULL) { \
1082 ifield = dvmResolveInstField(curMethod->clazz, ref); \
1083 if (ifield == NULL) \
1084 GOTO_exceptionThrown(); \
1085 } \
1086 dvmSetField##_ftype(obj, ifield->byteOffset, \
1087 GET_REGISTER##_regsize(vdst)); \
1088 ILOGV("+ IPUT '%s'=0x%08llx", ifield->name, \
1089 (u8) GET_REGISTER##_regsize(vdst)); \
1090 } \
1091 FINISH(2);
1092
1093 #define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
1094 HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
1095 { \
1096 Object* obj; \
1097 vdst = INST_A(inst); \
1098 vsrc1 = INST_B(inst); /* object ptr */ \
1099 ref = FETCH(1); /* field offset */ \
1100 ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
1101 (_opname), vdst, vsrc1, ref); \
1102 obj = (Object*) GET_REGISTER(vsrc1); \
1103 if (!checkForNullExportPC(obj, fp, pc)) \
1104 GOTO_exceptionThrown(); \
1105 dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
1106 ILOGV("+ IPUTQ %d=0x%08llx", ref, \
1107 (u8) GET_REGISTER##_regsize(vdst)); \
1108 } \
1109 FINISH(2);
1110
1111 /*
1112 * The JIT needs dvmDexGetResolvedField() to return non-null.
1113 * Because the portable interpreter is not involved with the JIT
1114 * and trace building, we only need the extra check here when this
1115 * code is massaged into a stub called from an assembly interpreter.
1116 * This is controlled by the JIT_STUB_HACK maco.
1117 */
1118
1119 #define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
1120 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1121 { \
1122 StaticField* sfield; \
1123 vdst = INST_AA(inst); \
1124 ref = FETCH(1); /* field ref */ \
1125 ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1126 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1127 if (sfield == NULL) { \
1128 EXPORT_PC(); \
1129 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1130 if (sfield == NULL) \
1131 GOTO_exceptionThrown(); \
1132 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1133 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1134 } \
1135 } \
1136 SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
1137 ILOGV("+ SGET '%s'=0x%08llx", \
1138 sfield->name, (u8)GET_REGISTER##_regsize(vdst)); \
1139 } \
1140 FINISH(2);
1141
1142 #define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
1143 HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
1144 { \
1145 StaticField* sfield; \
1146 vdst = INST_AA(inst); \
1147 ref = FETCH(1); /* field ref */ \
1148 ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
1149 sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
1150 if (sfield == NULL) { \
1151 EXPORT_PC(); \
1152 sfield = dvmResolveStaticField(curMethod->clazz, ref); \
1153 if (sfield == NULL) \
1154 GOTO_exceptionThrown(); \
1155 if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
1156 JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
1157 } \
1158 } \
1159 dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
1160 ILOGV("+ SPUT '%s'=0x%08llx", \
1161 sfield->name, (u8)GET_REGISTER##_regsize(vdst)); \
1162 } \
1163 FINISH(2);
1164
1165 /* File: cstubs/enddefs.cpp */
1166
1167 /* undefine "magic" name remapping */
1168 #undef retval
1169 #undef pc
1170 #undef fp
1171 #undef curMethod
1172 #undef methodClassDex
1173 #undef self
1174 #undef debugTrackedRefStart
1175
1176 /* File: armv5te/debug.cpp */
1177 #include <inttypes.h>
1178
1179 /*
1180 * Dump the fixed-purpose ARM registers, along with some other info.
1181 *
1182 * This function MUST be compiled in ARM mode -- THUMB will yield bogus
1183 * results.
1184 *
1185 * This will NOT preserve r0-r3/ip.
1186 */
dvmMterpDumpArmRegs(uint32_t r0,uint32_t r1,uint32_t r2,uint32_t r3)1187 void dvmMterpDumpArmRegs(uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3)
1188 {
1189 // TODO: Clang does not support asm declaration syntax.
1190 #ifndef __clang__
1191 register uint32_t rPC asm("r4");
1192 register uint32_t rFP asm("r5");
1193 register uint32_t rSELF asm("r6");
1194 register uint32_t rINST asm("r7");
1195 register uint32_t rIBASE asm("r8");
1196 register uint32_t r9 asm("r9");
1197 register uint32_t r10 asm("r10");
1198
1199 //extern char dvmAsmInstructionStart[];
1200
1201 printf("REGS: r0=%08x r1=%08x r2=%08x r3=%08x\n", r0, r1, r2, r3);
1202 printf(" : rPC=%08x rFP=%08x rSELF=%08x rINST=%08x\n",
1203 rPC, rFP, rSELF, rINST);
1204 printf(" : rIBASE=%08x r9=%08x r10=%08x\n", rIBASE, r9, r10);
1205 #endif
1206
1207 //Thread* self = (Thread*) rSELF;
1208 //const Method* method = self->method;
1209 printf(" + self is %p\n", dvmThreadSelf());
1210 //printf(" + currently in %s.%s %s\n",
1211 // method->clazz->descriptor, method->name, method->shorty);
1212 //printf(" + dvmAsmInstructionStart = %p\n", dvmAsmInstructionStart);
1213 //printf(" + next handler for 0x%02x = %p\n",
1214 // rINST & 0xff, dvmAsmInstructionStart + (rINST & 0xff) * 64);
1215 }
1216
1217 /*
1218 * Dump the StackSaveArea for the specified frame pointer.
1219 */
dvmDumpFp(void * fp,StackSaveArea * otherSaveArea)1220 void dvmDumpFp(void* fp, StackSaveArea* otherSaveArea)
1221 {
1222 StackSaveArea* saveArea = SAVEAREA_FROM_FP(fp);
1223 printf("StackSaveArea for fp %p [%p/%p]:\n", fp, saveArea, otherSaveArea);
1224 #ifdef EASY_GDB
1225 printf(" prevSave=%p, prevFrame=%p savedPc=%p meth=%p curPc=%p\n",
1226 saveArea->prevSave, saveArea->prevFrame, saveArea->savedPc,
1227 saveArea->method, saveArea->xtra.currentPc);
1228 #else
1229 printf(" prevFrame=%p savedPc=%p meth=%p curPc=%p fp[0]=0x%08x\n",
1230 saveArea->prevFrame, saveArea->savedPc,
1231 saveArea->method, saveArea->xtra.currentPc,
1232 *(u4*)fp);
1233 #endif
1234 }
1235
1236 /*
1237 * Does the bulk of the work for common_printMethod().
1238 */
dvmMterpPrintMethod(Method * method)1239 void dvmMterpPrintMethod(Method* method)
1240 {
1241 /*
1242 * It is a direct (non-virtual) method if it is static, private,
1243 * or a constructor.
1244 */
1245 bool isDirect =
1246 ((method->accessFlags & (ACC_STATIC|ACC_PRIVATE)) != 0) ||
1247 (method->name[0] == '<');
1248
1249 char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
1250
1251 printf("<%c:%s.%s %s> ",
1252 isDirect ? 'D' : 'V',
1253 method->clazz->descriptor,
1254 method->name,
1255 desc);
1256
1257 free(desc);
1258 }
1259
1260