1%default {"result":"%eax","tmp":"%ecx"} 2 /* 3 * Generic 32-bit binary operation in which both operands loaded to 4 * registers (op0 in eax, op1 in ecx). 5 */ 6 /* binop vAA, vBB, vCC */ 7 movzbl 2(rPC),%eax # eax<- BB 8 movzbl 3(rPC),%ecx # ecx<- CC 9 GET_VREG_R %eax %eax # eax<- vBB 10 GET_VREG_R %ecx %ecx # eax<- vBB 11 $instr # ex: addl %ecx,%eax 12 SET_VREG $result rINST 13 FETCH_INST_OPCODE 2 %ecx 14 ADVANCE_PC 2 15 GOTO_NEXT_R %ecx 16