1 //===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Hexagon specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "HexagonMCTargetDesc.h"
15 #include "HexagonMCAsmInfo.h"
16 #include "InstPrinter/HexagonInstPrinter.h"
17 #include "llvm/MC/MachineLocation.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/TargetRegistry.h"
25
26 #define GET_INSTRINFO_MC_DESC
27 #include "HexagonGenInstrInfo.inc"
28
29 #define GET_SUBTARGETINFO_MC_DESC
30 #include "HexagonGenSubtargetInfo.inc"
31
32 #define GET_REGINFO_MC_DESC
33 #include "HexagonGenRegisterInfo.inc"
34
35 using namespace llvm;
36
createHexagonMCInstrInfo()37 static MCInstrInfo *createHexagonMCInstrInfo() {
38 MCInstrInfo *X = new MCInstrInfo();
39 InitHexagonMCInstrInfo(X);
40 return X;
41 }
42
createHexagonMCRegisterInfo(StringRef TT)43 static MCRegisterInfo *createHexagonMCRegisterInfo(StringRef TT) {
44 MCRegisterInfo *X = new MCRegisterInfo();
45 InitHexagonMCRegisterInfo(X, Hexagon::R0);
46 return X;
47 }
48
createHexagonMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)49 static MCSubtargetInfo *createHexagonMCSubtargetInfo(StringRef TT,
50 StringRef CPU,
51 StringRef FS) {
52 MCSubtargetInfo *X = new MCSubtargetInfo();
53 InitHexagonMCSubtargetInfo(X, TT, CPU, FS);
54 return X;
55 }
56
createHexagonMCAsmInfo(const Target & T,StringRef TT)57 static MCAsmInfo *createHexagonMCAsmInfo(const Target &T, StringRef TT) {
58 MCAsmInfo *MAI = new HexagonMCAsmInfo(T, TT);
59
60 // VirtualFP = (R30 + #0).
61 MachineLocation Dst(MachineLocation::VirtualFP);
62 MachineLocation Src(Hexagon::R30, 0);
63 MAI->addInitialFrameState(0, Dst, Src);
64
65 return MAI;
66 }
67
createHexagonMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)68 static MCCodeGenInfo *createHexagonMCCodeGenInfo(StringRef TT, Reloc::Model RM,
69 CodeModel::Model CM,
70 CodeGenOpt::Level OL) {
71 MCCodeGenInfo *X = new MCCodeGenInfo();
72 // For the time being, use static relocations, since there's really no
73 // support for PIC yet.
74 X->InitMCCodeGenInfo(Reloc::Static, CM, OL);
75 return X;
76 }
77
78 // Force static initialization.
LLVMInitializeHexagonTargetMC()79 extern "C" void LLVMInitializeHexagonTargetMC() {
80 // Register the MC asm info.
81 RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
82
83 // Register the MC codegen info.
84 TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
85 createHexagonMCCodeGenInfo);
86
87 // Register the MC instruction info.
88 TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget, createHexagonMCInstrInfo);
89
90 // Register the MC register info.
91 TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
92 createHexagonMCRegisterInfo);
93
94 // Register the MC subtarget info.
95 TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
96 createHexagonMCSubtargetInfo);
97 }
98