1//===---- AMDCallingConv.td - Calling Conventions for Radeon GPUs ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This describes the calling conventions for the AMD Radeon GPUs. 11// 12//===----------------------------------------------------------------------===// 13 14// Inversion of CCIfInReg 15class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {} 16 17// Calling convention for SI 18def CC_SI : CallingConv<[ 19 20 CCIfInReg<CCIfType<[f32, i32] , CCAssignToReg<[ 21 SGPR0, SGPR1, SGPR2, SGPR3, SGPR4, SGPR5, SGPR6, SGPR7, 22 SGPR8, SGPR9, SGPR10, SGPR11, SGPR12, SGPR13, SGPR14, SGPR15 23 ]>>>, 24 25 CCIfInReg<CCIfType<[i64] , CCAssignToRegWithShadow< 26 [ SGPR0, SGPR2, SGPR4, SGPR6, SGPR8, SGPR10, SGPR12, SGPR14 ], 27 [ SGPR1, SGPR3, SGPR5, SGPR7, SGPR9, SGPR11, SGPR12, SGPR15 ] 28 >>>, 29 30 CCIfNotInReg<CCIfType<[f32, i32] , CCAssignToReg<[ 31 VGPR0, VGPR1, VGPR2, VGPR3, VGPR4, VGPR5, VGPR6, VGPR7, 32 VGPR8, VGPR9, VGPR10, VGPR11, VGPR12, VGPR13, VGPR14, VGPR15, 33 VGPR16, VGPR17, VGPR18, VGPR19, VGPR20, VGPR21, VGPR22, VGPR23, 34 VGPR24, VGPR25, VGPR26, VGPR27, VGPR28, VGPR29, VGPR30, VGPR31 35 ]>>> 36 37]>; 38 39def CC_AMDGPU : CallingConv<[ 40 CCIf<"State.getTarget().getSubtarget<AMDGPUSubtarget>().device()"# 41 "->getGeneration() == AMDGPUDeviceInfo::HD7XXX", CCDelegateTo<CC_SI>> 42]>; 43