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1 //===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Sparc implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "SparcFrameLowering.h"
15 #include "SparcInstrInfo.h"
16 #include "SparcMachineFunctionInfo.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineModuleInfo.h"
21 #include "llvm/CodeGen/MachineRegisterInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/IR/Function.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Target/TargetOptions.h"
26 
27 using namespace llvm;
28 
emitPrologue(MachineFunction & MF) const29 void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
30   MachineBasicBlock &MBB = MF.front();
31   MachineFrameInfo *MFI = MF.getFrameInfo();
32   const SparcInstrInfo &TII =
33     *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
34   MachineBasicBlock::iterator MBBI = MBB.begin();
35   DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
36 
37   // Get the number of bytes to allocate from the FrameInfo
38   int NumBytes = (int) MFI->getStackSize();
39 
40   // Emit the correct save instruction based on the number of bytes in
41   // the frame. Minimum stack frame size according to V8 ABI is:
42   //   16 words for register window spill
43   //    1 word for address of returned aggregate-value
44   // +  6 words for passing parameters on the stack
45   // ----------
46   //   23 words * 4 bytes per word = 92 bytes
47   NumBytes += 92;
48 
49   // Round up to next doubleword boundary -- a double-word boundary
50   // is required by the ABI.
51   NumBytes = (NumBytes + 7) & ~7;
52   NumBytes = -NumBytes;
53 
54   if (NumBytes >= -4096) {
55     BuildMI(MBB, MBBI, dl, TII.get(SP::SAVEri), SP::O6)
56       .addReg(SP::O6).addImm(NumBytes);
57   } else {
58     // Emit this the hard way.  This clobbers G1 which we always know is
59     // available here.
60     unsigned OffHi = (unsigned)NumBytes >> 10U;
61     BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1).addImm(OffHi);
62     // Emit G1 = G1 + I6
63     BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
64       .addReg(SP::G1).addImm(NumBytes & ((1 << 10)-1));
65     BuildMI(MBB, MBBI, dl, TII.get(SP::SAVErr), SP::O6)
66       .addReg(SP::O6).addReg(SP::G1);
67   }
68 }
69 
70 void SparcFrameLowering::
eliminateCallFramePseudoInstr(MachineFunction & MF,MachineBasicBlock & MBB,MachineBasicBlock::iterator I) const71 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
72                               MachineBasicBlock::iterator I) const {
73   MachineInstr &MI = *I;
74   DebugLoc dl = MI.getDebugLoc();
75   int Size = MI.getOperand(0).getImm();
76   if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
77     Size = -Size;
78   const SparcInstrInfo &TII =
79     *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
80   if (Size)
81     BuildMI(MBB, I, dl, TII.get(SP::ADDri), SP::O6).addReg(SP::O6).addImm(Size);
82   MBB.erase(I);
83 }
84 
85 
emitEpilogue(MachineFunction & MF,MachineBasicBlock & MBB) const86 void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
87                                   MachineBasicBlock &MBB) const {
88   MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
89   const SparcInstrInfo &TII =
90     *static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
91   DebugLoc dl = MBBI->getDebugLoc();
92   assert(MBBI->getOpcode() == SP::RETL &&
93          "Can only put epilog before 'retl' instruction!");
94   BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
95     .addReg(SP::G0);
96 }
97