1 //===-- XCoreMCTargetDesc.cpp - XCore Target Descriptions -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides XCore specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "XCoreMCTargetDesc.h"
15 #include "InstPrinter/XCoreInstPrinter.h"
16 #include "XCoreMCAsmInfo.h"
17 #include "llvm/MC/MCCodeGenInfo.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/Support/ErrorHandling.h"
22 #include "llvm/Support/TargetRegistry.h"
23
24 #define GET_INSTRINFO_MC_DESC
25 #include "XCoreGenInstrInfo.inc"
26
27 #define GET_SUBTARGETINFO_MC_DESC
28 #include "XCoreGenSubtargetInfo.inc"
29
30 #define GET_REGINFO_MC_DESC
31 #include "XCoreGenRegisterInfo.inc"
32
33 using namespace llvm;
34
createXCoreMCInstrInfo()35 static MCInstrInfo *createXCoreMCInstrInfo() {
36 MCInstrInfo *X = new MCInstrInfo();
37 InitXCoreMCInstrInfo(X);
38 return X;
39 }
40
createXCoreMCRegisterInfo(StringRef TT)41 static MCRegisterInfo *createXCoreMCRegisterInfo(StringRef TT) {
42 MCRegisterInfo *X = new MCRegisterInfo();
43 InitXCoreMCRegisterInfo(X, XCore::LR);
44 return X;
45 }
46
createXCoreMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)47 static MCSubtargetInfo *createXCoreMCSubtargetInfo(StringRef TT, StringRef CPU,
48 StringRef FS) {
49 MCSubtargetInfo *X = new MCSubtargetInfo();
50 InitXCoreMCSubtargetInfo(X, TT, CPU, FS);
51 return X;
52 }
53
createXCoreMCAsmInfo(const Target & T,StringRef TT)54 static MCAsmInfo *createXCoreMCAsmInfo(const Target &T, StringRef TT) {
55 MCAsmInfo *MAI = new XCoreMCAsmInfo(T, TT);
56
57 // Initial state of the frame pointer is SP.
58 MachineLocation Dst(MachineLocation::VirtualFP);
59 MachineLocation Src(XCore::SP, 0);
60 MAI->addInitialFrameState(0, Dst, Src);
61
62 return MAI;
63 }
64
createXCoreMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)65 static MCCodeGenInfo *createXCoreMCCodeGenInfo(StringRef TT, Reloc::Model RM,
66 CodeModel::Model CM,
67 CodeGenOpt::Level OL) {
68 MCCodeGenInfo *X = new MCCodeGenInfo();
69 X->InitMCCodeGenInfo(RM, CM, OL);
70 return X;
71 }
72
createXCoreMCInstPrinter(const Target & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI,const MCSubtargetInfo & STI)73 static MCInstPrinter *createXCoreMCInstPrinter(const Target &T,
74 unsigned SyntaxVariant,
75 const MCAsmInfo &MAI,
76 const MCInstrInfo &MII,
77 const MCRegisterInfo &MRI,
78 const MCSubtargetInfo &STI) {
79 return new XCoreInstPrinter(MAI, MII, MRI);
80 }
81
82 // Force static initialization.
LLVMInitializeXCoreTargetMC()83 extern "C" void LLVMInitializeXCoreTargetMC() {
84 // Register the MC asm info.
85 RegisterMCAsmInfoFn X(TheXCoreTarget, createXCoreMCAsmInfo);
86
87 // Register the MC codegen info.
88 TargetRegistry::RegisterMCCodeGenInfo(TheXCoreTarget,
89 createXCoreMCCodeGenInfo);
90
91 // Register the MC instruction info.
92 TargetRegistry::RegisterMCInstrInfo(TheXCoreTarget, createXCoreMCInstrInfo);
93
94 // Register the MC register info.
95 TargetRegistry::RegisterMCRegInfo(TheXCoreTarget, createXCoreMCRegisterInfo);
96
97 // Register the MC subtarget info.
98 TargetRegistry::RegisterMCSubtargetInfo(TheXCoreTarget,
99 createXCoreMCSubtargetInfo);
100
101 // Register the MCInstPrinter
102 TargetRegistry::RegisterMCInstPrinter(TheXCoreTarget,
103 createXCoreMCInstPrinter);
104 }
105