1; RUN: llc -O0 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \ 2; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=MEDIUM %s 3; RUN: llc -O0 -mcpu=pwr7 -code-model=large -filetype=obj %s -o - | \ 4; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=LARGE %s 5 6; FIXME: When asm-parse is available, could make this an assembly test. 7 8target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" 9target triple = "powerpc64-unknown-linux-gnu" 10 11@ei = external global i32 12 13define signext i32 @test_external() nounwind { 14entry: 15 %0 = load i32* @ei, align 4 16 %inc = add nsw i32 %0, 1 17 store i32 %inc, i32* @ei, align 4 18 ret i32 %0 19} 20 21; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 22; accessing external variable ei. 23; 24; MEDIUM: '.rela.text' 25; MEDIUM: Relocation 0 26; MEDIUM-NEXT: 'r_offset' 27; MEDIUM-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] 28; MEDIUM-NEXT: 'r_type', 0x00000032 29; MEDIUM: Relocation 1 30; MEDIUM-NEXT: 'r_offset' 31; MEDIUM-NEXT: 'r_sym', 0x[[SYM1]] 32; MEDIUM-NEXT: 'r_type', 0x00000040 33; 34; LARGE: '.rela.text' 35; LARGE: Relocation 0 36; LARGE-NEXT: 'r_offset' 37; LARGE-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] 38; LARGE-NEXT: 'r_type', 0x00000032 39; LARGE: Relocation 1 40; LARGE-NEXT: 'r_offset' 41; LARGE-NEXT: 'r_sym', 0x[[SYM1]] 42; LARGE-NEXT: 'r_type', 0x00000040 43 44@test_fn_static.si = internal global i32 0, align 4 45 46define signext i32 @test_fn_static() nounwind { 47entry: 48 %0 = load i32* @test_fn_static.si, align 4 49 %inc = add nsw i32 %0, 1 50 store i32 %inc, i32* @test_fn_static.si, align 4 51 ret i32 %0 52} 53 54; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 55; accessing function-scoped variable si. 56; 57; MEDIUM: Relocation 2 58; MEDIUM-NEXT: 'r_offset' 59; MEDIUM-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] 60; MEDIUM-NEXT: 'r_type', 0x00000032 61; MEDIUM: Relocation 3 62; MEDIUM-NEXT: 'r_offset' 63; MEDIUM-NEXT: 'r_sym', 0x[[SYM2]] 64; MEDIUM-NEXT: 'r_type', 0x00000030 65; 66; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 67; accessing function-scoped variable si. 68; 69; LARGE: Relocation 2 70; LARGE-NEXT: 'r_offset' 71; LARGE-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] 72; LARGE-NEXT: 'r_type', 0x00000032 73; LARGE: Relocation 3 74; LARGE-NEXT: 'r_offset' 75; LARGE-NEXT: 'r_sym', 0x[[SYM2]] 76; LARGE-NEXT: 'r_type', 0x00000040 77 78@gi = global i32 5, align 4 79 80define signext i32 @test_file_static() nounwind { 81entry: 82 %0 = load i32* @gi, align 4 83 %inc = add nsw i32 %0, 1 84 store i32 %inc, i32* @gi, align 4 85 ret i32 %0 86} 87 88; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 89; accessing file-scope variable gi. 90; 91; MEDIUM: Relocation 4 92; MEDIUM-NEXT: 'r_offset' 93; MEDIUM-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] 94; MEDIUM-NEXT: 'r_type', 0x00000032 95; MEDIUM: Relocation 5 96; MEDIUM-NEXT: 'r_offset' 97; MEDIUM-NEXT: 'r_sym', 0x[[SYM3]] 98; MEDIUM-NEXT: 'r_type', 0x00000030 99; 100; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 101; accessing file-scope variable gi. 102; 103; LARGE: Relocation 4 104; LARGE-NEXT: 'r_offset' 105; LARGE-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] 106; LARGE-NEXT: 'r_type', 0x00000032 107; LARGE: Relocation 5 108; LARGE-NEXT: 'r_offset' 109; LARGE-NEXT: 'r_sym', 0x[[SYM3]] 110; LARGE-NEXT: 'r_type', 0x00000040 111 112define double @test_double_const() nounwind { 113entry: 114 ret double 0x3F4FD4920B498CF0 115} 116 117; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for 118; accessing a constant. 119; 120; MEDIUM: Relocation 6 121; MEDIUM-NEXT: 'r_offset' 122; MEDIUM-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] 123; MEDIUM-NEXT: 'r_type', 0x00000032 124; MEDIUM: Relocation 7 125; MEDIUM-NEXT: 'r_offset' 126; MEDIUM-NEXT: 'r_sym', 0x[[SYM4]] 127; MEDIUM-NEXT: 'r_type', 0x00000030 128; 129; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 130; accessing a constant. 131; 132; LARGE: Relocation 6 133; LARGE-NEXT: 'r_offset' 134; LARGE-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] 135; LARGE-NEXT: 'r_type', 0x00000032 136; LARGE: Relocation 7 137; LARGE-NEXT: 'r_offset' 138; LARGE-NEXT: 'r_sym', 0x[[SYM4]] 139; LARGE-NEXT: 'r_type', 0x00000040 140 141define signext i32 @test_jump_table(i32 signext %i) nounwind { 142entry: 143 %i.addr = alloca i32, align 4 144 store i32 %i, i32* %i.addr, align 4 145 %0 = load i32* %i.addr, align 4 146 switch i32 %0, label %sw.default [ 147 i32 3, label %sw.bb 148 i32 4, label %sw.bb1 149 i32 5, label %sw.bb2 150 i32 6, label %sw.bb3 151 ] 152 153sw.default: ; preds = %entry 154 br label %sw.epilog 155 156sw.bb: ; preds = %entry 157 %1 = load i32* %i.addr, align 4 158 %mul = mul nsw i32 %1, 7 159 store i32 %mul, i32* %i.addr, align 4 160 br label %sw.bb1 161 162sw.bb1: ; preds = %entry, %sw.bb 163 %2 = load i32* %i.addr, align 4 164 %dec = add nsw i32 %2, -1 165 store i32 %dec, i32* %i.addr, align 4 166 br label %sw.bb2 167 168sw.bb2: ; preds = %entry, %sw.bb1 169 %3 = load i32* %i.addr, align 4 170 %add = add nsw i32 %3, 3 171 store i32 %add, i32* %i.addr, align 4 172 br label %sw.bb3 173 174sw.bb3: ; preds = %entry, %sw.bb2 175 %4 = load i32* %i.addr, align 4 176 %shl = shl i32 %4, 1 177 store i32 %shl, i32* %i.addr, align 4 178 br label %sw.epilog 179 180sw.epilog: ; preds = %sw.bb3, %sw.default 181 %5 = load i32* %i.addr, align 4 182 ret i32 %5 183} 184 185; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 186; accessing a jump table address. 187; 188; MEDIUM: Relocation 8 189; MEDIUM-NEXT: 'r_offset' 190; MEDIUM-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] 191; MEDIUM-NEXT: 'r_type', 0x00000032 192; MEDIUM: Relocation 9 193; MEDIUM-NEXT: 'r_offset' 194; MEDIUM-NEXT: 'r_sym', 0x[[SYM5]] 195; MEDIUM-NEXT: 'r_type', 0x00000040 196; 197; LARGE: Relocation 8 198; LARGE-NEXT: 'r_offset' 199; LARGE-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] 200; LARGE-NEXT: 'r_type', 0x00000032 201; LARGE: Relocation 9 202; LARGE-NEXT: 'r_offset' 203; LARGE-NEXT: 'r_sym', 0x[[SYM5]] 204; LARGE-NEXT: 'r_type', 0x00000040 205 206@ti = common global i32 0, align 4 207 208define signext i32 @test_tentative() nounwind { 209entry: 210 %0 = load i32* @ti, align 4 211 %inc = add nsw i32 %0, 1 212 store i32 %inc, i32* @ti, align 4 213 ret i32 %0 214} 215 216; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 217; accessing tentatively declared variable ti. 218; 219; MEDIUM: Relocation 10 220; MEDIUM-NEXT: 'r_offset' 221; MEDIUM-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] 222; MEDIUM-NEXT: 'r_type', 0x00000032 223; MEDIUM: Relocation 11 224; MEDIUM-NEXT: 'r_offset' 225; MEDIUM-NEXT: 'r_sym', 0x[[SYM6]] 226; MEDIUM-NEXT: 'r_type', 0x00000040 227; 228; LARGE: Relocation 10 229; LARGE-NEXT: 'r_offset' 230; LARGE-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] 231; LARGE-NEXT: 'r_type', 0x00000032 232; LARGE: Relocation 11 233; LARGE-NEXT: 'r_offset' 234; LARGE-NEXT: 'r_sym', 0x[[SYM6]] 235; LARGE-NEXT: 'r_type', 0x00000040 236 237define i8* @test_fnaddr() nounwind { 238entry: 239 %func = alloca i32 (i32)*, align 8 240 store i32 (i32)* @foo, i32 (i32)** %func, align 8 241 %0 = load i32 (i32)** %func, align 8 242 %1 = bitcast i32 (i32)* %0 to i8* 243 ret i8* %1 244} 245 246declare signext i32 @foo(i32 signext) 247 248; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for 249; accessing function address foo. 250; 251; MEDIUM: Relocation 12 252; MEDIUM-NEXT: 'r_offset' 253; MEDIUM-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] 254; MEDIUM-NEXT: 'r_type', 0x00000032 255; MEDIUM: Relocation 13 256; MEDIUM-NEXT: 'r_offset' 257; MEDIUM-NEXT: 'r_sym', 0x[[SYM7]] 258; MEDIUM-NEXT: 'r_type', 0x00000040 259; 260; LARGE: Relocation 12 261; LARGE-NEXT: 'r_offset' 262; LARGE-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] 263; LARGE-NEXT: 'r_type', 0x00000032 264; LARGE: Relocation 13 265; LARGE-NEXT: 'r_offset' 266; LARGE-NEXT: 'r_sym', 0x[[SYM7]] 267; LARGE-NEXT: 'r_type', 0x00000040 268 269