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1;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
2
3;CHECK: S_MOV_B32
4;CHECK-NEXT: V_INTERP_MOV_F32
5
6define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg) "ShaderType"="0" {
7main_body:
8  %4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
9  %5 = call i32 @llvm.SI.packf16(float %4, float %4)
10  %6 = bitcast i32 %5 to float
11  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
12  ret void
13}
14
15declare void @llvm.AMDGPU.shader.type(i32)
16
17declare float @llvm.SI.fs.constant(i32, i32, i32) readonly
18
19declare i32 @llvm.SI.packf16(float, float) readnone
20
21declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
22