1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s 2 3; CHECK: vandpd 4define <4 x double> @andpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 5entry: 6 %0 = bitcast <4 x double> %x to <4 x i64> 7 %1 = bitcast <4 x double> %y to <4 x i64> 8 %and.i = and <4 x i64> %0, %1 9 %2 = bitcast <4 x i64> %and.i to <4 x double> 10 ; add forces execution domain 11 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0> 12 ret <4 x double> %3 13} 14 15; CHECK: vandpd LCP{{.*}}(%rip) 16define <4 x double> @andpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 17entry: 18 %0 = bitcast <4 x double> %y to <4 x i64> 19 %and.i = and <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 20 %1 = bitcast <4 x i64> %and.i to <4 x double> 21 ; add forces execution domain 22 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0> 23 ret <4 x double> %2 24} 25 26; CHECK: vandps 27define <8 x float> @andps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 28entry: 29 %0 = bitcast <8 x float> %x to <8 x i32> 30 %1 = bitcast <8 x float> %y to <8 x i32> 31 %and.i = and <8 x i32> %0, %1 32 %2 = bitcast <8 x i32> %and.i to <8 x float> 33 ret <8 x float> %2 34} 35 36; CHECK: vandps LCP{{.*}}(%rip) 37define <8 x float> @andps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 38entry: 39 %0 = bitcast <8 x float> %y to <8 x i32> 40 %and.i = and <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 41 %1 = bitcast <8 x i32> %and.i to <8 x float> 42 ret <8 x float> %1 43} 44 45; CHECK: vxorpd 46define <4 x double> @xorpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 47entry: 48 %0 = bitcast <4 x double> %x to <4 x i64> 49 %1 = bitcast <4 x double> %y to <4 x i64> 50 %xor.i = xor <4 x i64> %0, %1 51 %2 = bitcast <4 x i64> %xor.i to <4 x double> 52 ; add forces execution domain 53 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0> 54 ret <4 x double> %3 55} 56 57; CHECK: vxorpd LCP{{.*}}(%rip) 58define <4 x double> @xorpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 59entry: 60 %0 = bitcast <4 x double> %y to <4 x i64> 61 %xor.i = xor <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 62 %1 = bitcast <4 x i64> %xor.i to <4 x double> 63 ; add forces execution domain 64 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0> 65 ret <4 x double> %2 66} 67 68; CHECK: vxorps 69define <8 x float> @xorps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 70entry: 71 %0 = bitcast <8 x float> %x to <8 x i32> 72 %1 = bitcast <8 x float> %y to <8 x i32> 73 %xor.i = xor <8 x i32> %0, %1 74 %2 = bitcast <8 x i32> %xor.i to <8 x float> 75 ret <8 x float> %2 76} 77 78; CHECK: vxorps LCP{{.*}}(%rip) 79define <8 x float> @xorps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 80entry: 81 %0 = bitcast <8 x float> %y to <8 x i32> 82 %xor.i = xor <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 83 %1 = bitcast <8 x i32> %xor.i to <8 x float> 84 ret <8 x float> %1 85} 86 87; CHECK: vorpd 88define <4 x double> @orpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 89entry: 90 %0 = bitcast <4 x double> %x to <4 x i64> 91 %1 = bitcast <4 x double> %y to <4 x i64> 92 %or.i = or <4 x i64> %0, %1 93 %2 = bitcast <4 x i64> %or.i to <4 x double> 94 ; add forces execution domain 95 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0> 96 ret <4 x double> %3 97} 98 99; CHECK: vorpd LCP{{.*}}(%rip) 100define <4 x double> @orpd256fold(<4 x double> %y) nounwind uwtable readnone ssp { 101entry: 102 %0 = bitcast <4 x double> %y to <4 x i64> 103 %or.i = or <4 x i64> %0, <i64 4616752568008179712, i64 4614838538166547251, i64 4612361558371493478, i64 4608083138725491507> 104 %1 = bitcast <4 x i64> %or.i to <4 x double> 105 ; add forces execution domain 106 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0> 107 ret <4 x double> %2 108} 109 110; CHECK: vorps 111define <8 x float> @orps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 112entry: 113 %0 = bitcast <8 x float> %x to <8 x i32> 114 %1 = bitcast <8 x float> %y to <8 x i32> 115 %or.i = or <8 x i32> %0, %1 116 %2 = bitcast <8 x i32> %or.i to <8 x float> 117 ret <8 x float> %2 118} 119 120; CHECK: vorps LCP{{.*}}(%rip) 121define <8 x float> @orps256fold(<8 x float> %y) nounwind uwtable readnone ssp { 122entry: 123 %0 = bitcast <8 x float> %y to <8 x i32> 124 %or.i = or <8 x i32> %0, <i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938, i32 1083179008, i32 1079613850, i32 1075000115, i32 1067030938> 125 %1 = bitcast <8 x i32> %or.i to <8 x float> 126 ret <8 x float> %1 127} 128 129; CHECK: vandnpd 130define <4 x double> @andnotpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp { 131entry: 132 %0 = bitcast <4 x double> %x to <4 x i64> 133 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> 134 %1 = bitcast <4 x double> %y to <4 x i64> 135 %and.i = and <4 x i64> %1, %neg.i 136 %2 = bitcast <4 x i64> %and.i to <4 x double> 137 ; add forces execution domain 138 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0> 139 ret <4 x double> %3 140} 141 142; CHECK: vandnpd (% 143define <4 x double> @andnotpd256fold(<4 x double> %y, <4 x double>* nocapture %x) nounwind uwtable readonly ssp { 144entry: 145 %tmp2 = load <4 x double>* %x, align 32 146 %0 = bitcast <4 x double> %y to <4 x i64> 147 %neg.i = xor <4 x i64> %0, <i64 -1, i64 -1, i64 -1, i64 -1> 148 %1 = bitcast <4 x double> %tmp2 to <4 x i64> 149 %and.i = and <4 x i64> %1, %neg.i 150 %2 = bitcast <4 x i64> %and.i to <4 x double> 151 ; add forces execution domain 152 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0> 153 ret <4 x double> %3 154} 155 156; CHECK: vandnps 157define <8 x float> @andnotps256(<8 x float> %y, <8 x float> %x) nounwind uwtable readnone ssp { 158entry: 159 %0 = bitcast <8 x float> %x to <8 x i32> 160 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 161 %1 = bitcast <8 x float> %y to <8 x i32> 162 %and.i = and <8 x i32> %1, %neg.i 163 %2 = bitcast <8 x i32> %and.i to <8 x float> 164 ret <8 x float> %2 165} 166 167; CHECK: vandnps (% 168define <8 x float> @andnotps256fold(<8 x float> %y, <8 x float>* nocapture %x) nounwind uwtable readonly ssp { 169entry: 170 %tmp2 = load <8 x float>* %x, align 32 171 %0 = bitcast <8 x float> %y to <8 x i32> 172 %neg.i = xor <8 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 173 %1 = bitcast <8 x float> %tmp2 to <8 x i32> 174 %and.i = and <8 x i32> %1, %neg.i 175 %2 = bitcast <8 x i32> %and.i to <8 x float> 176 ret <8 x float> %2 177} 178 179;;; Test that basic 2 x i64 logic use the integer version on AVX 180 181; CHECK: vpandn %xmm 182define <2 x i64> @vpandn(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 183entry: 184 ; Force the execution domain with an add. 185 %a2 = add <2 x i64> %a, <i64 1, i64 1> 186 %y = xor <2 x i64> %a2, <i64 -1, i64 -1> 187 %x = and <2 x i64> %a, %y 188 ret <2 x i64> %x 189} 190 191; CHECK: vpand %xmm 192define <2 x i64> @vpand(<2 x i64> %a, <2 x i64> %b) nounwind uwtable readnone ssp { 193entry: 194 ; Force the execution domain with an add. 195 %a2 = add <2 x i64> %a, <i64 1, i64 1> 196 %x = and <2 x i64> %a2, %b 197 ret <2 x i64> %x 198} 199 200