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1; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=sse41 | FileCheck %s --check-prefix=X32
2; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64
3; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64
4
5define i32 @test1() nounwind readonly {
6entry:
7	%tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31)		; <i32*> [#uses=1]
8	%tmp1 = load i32* %tmp		; <i32> [#uses=1]
9	ret i32 %tmp1
10}
11; X32: test1:
12; X32: 	movl	%gs:196, %eax
13; X32: 	movl	(%eax), %eax
14; X32: 	ret
15
16; X64: test1:
17; X64: 	movq	%gs:320, %rax
18; X64: 	movl	(%rax), %eax
19; X64: 	ret
20
21define i64 @test2(void (i8*)* addrspace(256)* %tmp8) nounwind {
22entry:
23  %tmp9 = load void (i8*)* addrspace(256)* %tmp8, align 8
24  tail call void %tmp9(i8* undef) nounwind optsize
25  ret i64 0
26}
27
28; rdar://8453210
29; X32: test2:
30; X32: movl	{{.*}}(%esp), %eax
31; X32: calll	*%gs:(%eax)
32
33; X64: test2:
34; X64: callq	*%gs:([[A0:%rdi|%rcx]])
35
36
37
38
39define <2 x i64> @pmovsxwd_1(i64 addrspace(256)* %p) nounwind readonly {
40entry:
41  %0 = load i64 addrspace(256)* %p
42  %tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0
43  %1 = bitcast <2 x i64> %tmp2 to <8 x i16>
44  %2 = tail call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1) nounwind readnone
45  %3 = bitcast <4 x i32> %2 to <2 x i64>
46  ret <2 x i64> %3
47
48; X32: pmovsxwd_1:
49; X32: 	movl	4(%esp), %eax
50; X32: 	pmovsxwd	%gs:(%eax), %xmm0
51; X32: 	ret
52
53; X64: pmovsxwd_1:
54; X64:	pmovsxwd	%gs:([[A0]]), %xmm0
55; X64:	ret
56}
57
58; The two loads here both look identical to selection DAG, except for their
59; address spaces.  Make sure they aren't CSE'd.
60define i32 @test_no_cse() nounwind readonly {
61entry:
62	%tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31)		; <i32*> [#uses=1]
63	%tmp1 = load i32* %tmp		; <i32> [#uses=1]
64	%tmp2 = load i32* addrspace(257)* getelementptr (i32* addrspace(257)* inttoptr (i32 72 to i32* addrspace(257)*), i32 31)		; <i32*> [#uses=1]
65	%tmp3 = load i32* %tmp2		; <i32> [#uses=1]
66	%tmp4 = add i32 %tmp1, %tmp3
67	ret i32 %tmp4
68}
69; X32: test_no_cse:
70; X32: 	movl	%gs:196
71; X32: 	movl	%fs:196
72; X32: 	ret
73
74declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone
75