1 /* libs/pixelflinger/codeflinger/ARMAssembler.h 2 ** 3 ** Copyright 2006, The Android Open Source Project 4 ** 5 ** Licensed under the Apache License, Version 2.0 (the "License"); 6 ** you may not use this file except in compliance with the License. 7 ** You may obtain a copy of the License at 8 ** 9 ** http://www.apache.org/licenses/LICENSE-2.0 10 ** 11 ** Unless required by applicable law or agreed to in writing, software 12 ** distributed under the License is distributed on an "AS IS" BASIS, 13 ** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 ** See the License for the specific language governing permissions and 15 ** limitations under the License. 16 */ 17 18 #ifndef ANDROID_ARMASSEMBLER_H 19 #define ANDROID_ARMASSEMBLER_H 20 21 #include <stdint.h> 22 #include <sys/types.h> 23 24 #include "tinyutils/Vector.h" 25 #include "tinyutils/KeyedVector.h" 26 #include "tinyutils/smartpointer.h" 27 28 #include "ARMAssemblerInterface.h" 29 #include "CodeCache.h" 30 31 namespace android { 32 33 // ---------------------------------------------------------------------------- 34 35 class ARMAssembler : public ARMAssemblerInterface 36 { 37 public: 38 ARMAssembler(const sp<Assembly>& assembly); 39 virtual ~ARMAssembler(); 40 41 uint32_t* base() const; 42 uint32_t* pc() const; 43 44 45 void disassemble(const char* name); 46 47 // ------------------------------------------------------------------------ 48 // ARMAssemblerInterface... 49 // ------------------------------------------------------------------------ 50 51 virtual void reset(); 52 53 virtual int generate(const char* name); 54 virtual int getCodegenArch(); 55 56 virtual void prolog(); 57 virtual void epilog(uint32_t touched); 58 virtual void comment(const char* string); 59 60 61 // ----------------------------------------------------------------------- 62 // shifters and addressing modes 63 // ----------------------------------------------------------------------- 64 65 // shifters... 66 virtual bool isValidImmediate(uint32_t immed); 67 virtual int buildImmediate(uint32_t i, uint32_t& rot, uint32_t& imm); 68 69 virtual uint32_t imm(uint32_t immediate); 70 virtual uint32_t reg_imm(int Rm, int type, uint32_t shift); 71 virtual uint32_t reg_rrx(int Rm); 72 virtual uint32_t reg_reg(int Rm, int type, int Rs); 73 74 // addressing modes... 75 // LDR(B)/STR(B)/PLD 76 // (immediate and Rm can be negative, which indicates U=0) 77 virtual uint32_t immed12_pre(int32_t immed12, int W=0); 78 virtual uint32_t immed12_post(int32_t immed12); 79 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0); 80 virtual uint32_t reg_scale_post(int Rm, int type=0, uint32_t shift=0); 81 82 // LDRH/LDRSB/LDRSH/STRH 83 // (immediate and Rm can be negative, which indicates U=0) 84 virtual uint32_t immed8_pre(int32_t immed8, int W=0); 85 virtual uint32_t immed8_post(int32_t immed8); 86 virtual uint32_t reg_pre(int Rm, int W=0); 87 virtual uint32_t reg_post(int Rm); 88 89 90 virtual void dataProcessing(int opcode, int cc, int s, 91 int Rd, int Rn, 92 uint32_t Op2); 93 virtual void MLA(int cc, int s, 94 int Rd, int Rm, int Rs, int Rn); 95 virtual void MUL(int cc, int s, 96 int Rd, int Rm, int Rs); 97 virtual void UMULL(int cc, int s, 98 int RdLo, int RdHi, int Rm, int Rs); 99 virtual void UMUAL(int cc, int s, 100 int RdLo, int RdHi, int Rm, int Rs); 101 virtual void SMULL(int cc, int s, 102 int RdLo, int RdHi, int Rm, int Rs); 103 virtual void SMUAL(int cc, int s, 104 int RdLo, int RdHi, int Rm, int Rs); 105 106 virtual void B(int cc, uint32_t* pc); 107 virtual void BL(int cc, uint32_t* pc); 108 virtual void BX(int cc, int Rn); 109 virtual void label(const char* theLabel); 110 virtual void B(int cc, const char* label); 111 virtual void BL(int cc, const char* label); 112 113 virtual uint32_t* pcForLabel(const char* label); 114 115 virtual void LDR (int cc, int Rd, 116 int Rn, uint32_t offset = __immed12_pre(0)); 117 virtual void LDRB(int cc, int Rd, 118 int Rn, uint32_t offset = __immed12_pre(0)); 119 virtual void STR (int cc, int Rd, 120 int Rn, uint32_t offset = __immed12_pre(0)); 121 virtual void STRB(int cc, int Rd, 122 int Rn, uint32_t offset = __immed12_pre(0)); 123 virtual void LDRH (int cc, int Rd, 124 int Rn, uint32_t offset = __immed8_pre(0)); 125 virtual void LDRSB(int cc, int Rd, 126 int Rn, uint32_t offset = __immed8_pre(0)); 127 virtual void LDRSH(int cc, int Rd, 128 int Rn, uint32_t offset = __immed8_pre(0)); 129 virtual void STRH (int cc, int Rd, 130 int Rn, uint32_t offset = __immed8_pre(0)); 131 132 133 virtual void LDM(int cc, int dir, 134 int Rn, int W, uint32_t reg_list); 135 virtual void STM(int cc, int dir, 136 int Rn, int W, uint32_t reg_list); 137 138 virtual void SWP(int cc, int Rn, int Rd, int Rm); 139 virtual void SWPB(int cc, int Rn, int Rd, int Rm); 140 virtual void SWI(int cc, uint32_t comment); 141 142 virtual void PLD(int Rn, uint32_t offset); 143 virtual void CLZ(int cc, int Rd, int Rm); 144 virtual void QADD(int cc, int Rd, int Rm, int Rn); 145 virtual void QDADD(int cc, int Rd, int Rm, int Rn); 146 virtual void QSUB(int cc, int Rd, int Rm, int Rn); 147 virtual void QDSUB(int cc, int Rd, int Rm, int Rn); 148 virtual void SMUL(int cc, int xy, 149 int Rd, int Rm, int Rs); 150 virtual void SMULW(int cc, int y, 151 int Rd, int Rm, int Rs); 152 virtual void SMLA(int cc, int xy, 153 int Rd, int Rm, int Rs, int Rn); 154 virtual void SMLAL(int cc, int xy, 155 int RdHi, int RdLo, int Rs, int Rm); 156 virtual void SMLAW(int cc, int y, 157 int Rd, int Rm, int Rs, int Rn); 158 virtual void UXTB16(int cc, int Rd, int Rm, int rotate); 159 virtual void UBFX(int cc, int Rd, int Rn, int lsb, int width); 160 161 private: 162 ARMAssembler(const ARMAssembler& rhs); 163 ARMAssembler& operator = (const ARMAssembler& rhs); 164 165 sp<Assembly> mAssembly; 166 uint32_t* mBase; 167 uint32_t* mPC; 168 uint32_t* mPrologPC; 169 int64_t mDuration; 170 #if defined(WITH_LIB_HARDWARE) 171 bool mQemuTracing; 172 #endif 173 174 struct branch_target_t { branch_target_tbranch_target_t175 inline branch_target_t() : label(0), pc(0) { } branch_target_tbranch_target_t176 inline branch_target_t(const char* l, uint32_t* p) 177 : label(l), pc(p) { } 178 const char* label; 179 uint32_t* pc; 180 }; 181 182 Vector<branch_target_t> mBranchTargets; 183 KeyedVector< const char*, uint32_t* > mLabels; 184 KeyedVector< uint32_t*, const char* > mLabelsInverseMapping; 185 KeyedVector< uint32_t*, const char* > mComments; 186 }; 187 188 }; // namespace android 189 190 #endif //ANDROID_ARMASSEMBLER_H 191