756 GenerateRegisterCheckPatternForLoadStores(const StringRef &NameRef,  in GenerateRegisterCheckPatternForLoadStores()  argument
763   const bool IsLDSTOne = NameRef.count("vld1") || NameRef.count("vst1");  in GenerateRegisterCheckPatternForLoadStores()
817 static bool HasNPostfixAndScalarArgs(const StringRef &NameRef,  in HasNPostfixAndScalarArgs()  argument
819   return (NameRef.count("vmla") ||  in HasNPostfixAndScalarArgs()
820           NameRef.count("vmlal") ||  in HasNPostfixAndScalarArgs()
821           NameRef.count("vmlsl") ||  in HasNPostfixAndScalarArgs()
822           NameRef.count("vmull") ||  in HasNPostfixAndScalarArgs()
823           NameRef.count("vqdmlal") ||  in HasNPostfixAndScalarArgs()
824           NameRef.count("vqdmlsl") ||  in HasNPostfixAndScalarArgs()
825           NameRef.count("vqdmulh") ||  in HasNPostfixAndScalarArgs()
826           NameRef.count("vqdmull") ||  in HasNPostfixAndScalarArgs()
827           NameRef.count("vqrdmulh")) && HasNPostfix;  in HasNPostfixAndScalarArgs()
830 static bool IsFiveOperandLaneAccumulator(const StringRef &NameRef,  in IsFiveOperandLaneAccumulator()  argument
832   return (NameRef.count("vmla") ||  in IsFiveOperandLaneAccumulator()
833           NameRef.count("vmls") ||  in IsFiveOperandLaneAccumulator()
834           NameRef.count("vmlal") ||  in IsFiveOperandLaneAccumulator()
835           NameRef.count("vmlsl") ||  in IsFiveOperandLaneAccumulator()
836           (NameRef.count("vmul") && NameRef.size() == 3)||  in IsFiveOperandLaneAccumulator()
837           NameRef.count("vqdmlal") ||  in IsFiveOperandLaneAccumulator()
838           NameRef.count("vqdmlsl") ||  in IsFiveOperandLaneAccumulator()
839           NameRef.count("vqdmulh") ||  in IsFiveOperandLaneAccumulator()
840           NameRef.count("vqrdmulh")) && HasLanePostfix;  in IsFiveOperandLaneAccumulator()
843 static bool IsSpecialLaneMultiply(const StringRef &NameRef,  in IsSpecialLaneMultiply()  argument
846   const bool IsVMulOrMulh = (NameRef.count("vmul") || NameRef.count("mulh"))  in IsSpecialLaneMultiply()
848   const bool IsVMull = NameRef.count("mull") && !IsQuad;  in IsSpecialLaneMultiply()
860   const StringRef NameRef(Name);  in NormalizeProtoForRegisterPatternCreation()  local
887       } else if (HasNPostfixAndScalarArgs(NameRef, HasNPostfix)) {  in NormalizeProtoForRegisterPatternCreation()
897   const bool IsNotVExt = !NameRef.count("vext");  in NormalizeProtoForRegisterPatternCreation()
898   const bool IsVPADAL = NameRef.count("vpadal");  in NormalizeProtoForRegisterPatternCreation()
899   const bool Is5OpLaneAccum = IsFiveOperandLaneAccumulator(NameRef,  in NormalizeProtoForRegisterPatternCreation()
901   const bool IsSpecialLaneMul = IsSpecialLaneMultiply(NameRef, HasLanePostfix,  in NormalizeProtoForRegisterPatternCreation()
922   } else if (NameRef.count("vdup") && NormedProto.size() > 2) {  in NormalizeProtoForRegisterPatternCreation()
947   const StringRef NameRef(Name);  in GenerateRegisterCheckPattern()  local
950   if ((NameRef.count("vdup") || NameRef.count("vmov")) && HasNPostfix) {  in GenerateRegisterCheckPattern()
954   const bool IsLoadStore = NameRef.count("vld") || NameRef.count("vst");  in GenerateRegisterCheckPattern()
955   const bool IsTBXOrTBL = NameRef.count("vtbl") || NameRef.count("vtbx");  in GenerateRegisterCheckPattern()
959     const size_t Count = NameRef[3] - 48;  in GenerateRegisterCheckPattern()
961     GenerateRegisterCheckPatternForLoadStores(NameRef, OutTypeCode, IsQuad,  in GenerateRegisterCheckPattern()
972     if (NameRef.count("vget") || NameRef.count("vset"))  in GenerateRegisterCheckPattern()
1038   const StringRef NameRef(Name);  in GenerateChecksForIntrinsic()  local
1059   PreprocessInstruction(NameRef, InstName, Prefix,  in GenerateChecksForIntrinsic()
1112       Result.push_back(NameRef.slice(0, 3).str() + "1.64");  in GenerateChecksForIntrinsic()
1158     const std::string inTypeCode = NameRef.substr(NameRef.find_last_of("_")+1);  in GenerateChecksForIntrinsic()