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Searched refs:DCI (Results 1 – 25 of 29) sorted by relevance

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/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp313 TargetLowering::DAGCombinerInfo &DCI, in performADDECombine() argument
315 if (DCI.isBeforeLegalize()) in performADDECombine()
326 TargetLowering::DAGCombinerInfo &DCI, in performSUBECombine() argument
328 if (DCI.isBeforeLegalize()) in performSUBECombine()
377 const TargetLowering::DAGCombinerInfo &DCI, in performMULCombine() argument
411 TargetLowering::DAGCombinerInfo &DCI, in performSHLCombine() argument
422 TargetLowering::DAGCombinerInfo &DCI, in performSRACombine() argument
434 TargetLowering::DAGCombinerInfo &DCI, in performSRLCombine() argument
492 MipsSETargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const { in PerformDAGCombine()
493 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
[all …]
DMipsSEISelLowering.h29 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DMipsISelLowering.cpp421 TargetLowering::DAGCombinerInfo &DCI, in performDivRemCombine() argument
423 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()
531 TargetLowering::DAGCombinerInfo &DCI, in performSELECTCombine() argument
533 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()
564 TargetLowering::DAGCombinerInfo &DCI, in performANDCombine() argument
569 if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) in performANDCombine()
604 TargetLowering::DAGCombinerInfo &DCI, in performORCombine() argument
610 if (DCI.isBeforeLegalizeOps() || !Subtarget->hasMips32r2()) in performORCombine()
658 TargetLowering::DAGCombinerInfo &DCI, in performADDCombine() argument
662 if (DCI.isBeforeLegalizeOps()) in performADDCombine()
[all …]
DMipsISelLowering.h200 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1071 DAGCombinerInfo &DCI, SDLoc dl) const { in SimplifySetCC() argument
1072 SelectionDAG &DAG = DCI.DAG; in SimplifySetCC()
1141 if (DCI.isBeforeLegalize() && N0->hasOneUse() && in SimplifySetCC()
1180 if (DCI.isBeforeLegalize() && in SimplifySetCC()
1272 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()
1304 if (!DCI.isCalledByLegalizer()) in SimplifySetCC()
1305 DCI.AddToWorklist(ZextOp.getNode()); in SimplifySetCC()
1476 EVT ShiftTy = DCI.isBeforeLegalizeOps() ? in SimplifySetCC()
1506 EVT ShiftTy = DCI.isBeforeLegalizeOps() ? in SimplifySetCC()
1534 EVT ShiftTy = DCI.isBeforeLegalizeOps() ? in SimplifySetCC()
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/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp7856 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument
7858 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse()
7882 TargetLowering::DAGCombinerInfo &DCI) { in combineSelectAndUseCommutative() argument
7886 SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes); in combineSelectAndUseCommutative()
7891 SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes); in combineSelectAndUseCommutative()
7901 TargetLowering::DAGCombinerInfo &DCI, in AddCombineToVPADDL() argument
7906 if (DCI.isBeforeLegalize() || !Subtarget->hasNEON() in AddCombineToVPADDL()
7960 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADDL()
7995 TargetLowering::DAGCombinerInfo &DCI, in AddCombineTo64bitMLAL() argument
8001 if (DCI.isBeforeLegalize()) return SDValue(); in AddCombineTo64bitMLAL()
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DARMISelLowering.h283 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/external/mesa3d/src/gallium/drivers/radeon/
DSIISelLowering.h53 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DSIISelLowering.cpp393 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
394 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
430 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL); in PerformDAGCombine()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DSIISelLowering.h53 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DSIISelLowering.cpp393 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
394 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
430 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL); in PerformDAGCombine()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h389 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
628 SDValue DAGCombineFastRecip(SDValue Op, DAGCombinerInfo &DCI) const;
629 SDValue DAGCombineFastRecipFSQRT(SDValue Op, DAGCombinerInfo &DCI) const;
DPPCISelLowering.cpp6737 DAGCombinerInfo &DCI) const { in DAGCombineFastRecip()
6738 if (DCI.isAfterLegalizeVectorOps()) in DAGCombineFastRecip()
6762 SelectionDAG &DAG = DCI.DAG; in DAGCombineFastRecip()
6775 DCI.AddToWorklist(Est.getNode()); in DAGCombineFastRecip()
6780 DCI.AddToWorklist(NewEst.getNode()); in DAGCombineFastRecip()
6783 DCI.AddToWorklist(NewEst.getNode()); in DAGCombineFastRecip()
6786 DCI.AddToWorklist(NewEst.getNode()); in DAGCombineFastRecip()
6789 DCI.AddToWorklist(Est.getNode()); in DAGCombineFastRecip()
6799 DAGCombinerInfo &DCI) const { in DAGCombineFastRecipFSQRT()
6800 if (DCI.isAfterLegalizeVectorOps()) in DAGCombineFastRecipFSQRT()
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/external/llvm/lib/Target/R600/
DR600ISelLowering.h30 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DSIISelLowering.h59 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DSIISelLowering.cpp550 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
551 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
587 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL); in PerformDAGCombine()
DR600ISelLowering.cpp1382 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
1383 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2815 TargetLowering::DAGCombinerInfo &DCI) { in PerformANDCombine() argument
2817 SelectionDAG &DAG = DCI.DAG; in PerformANDCombine()
2929 TargetLowering::DAGCombinerInfo &DCI, in tryCombineToBFI() argument
2931 SelectionDAG &DAG = DCI.DAG; in tryCombineToBFI()
3010 TargetLowering::DAGCombinerInfo &DCI, in tryCombineToLargerBFI() argument
3012 SelectionDAG &DAG = DCI.DAG; in tryCombineToLargerBFI()
3093 TargetLowering::DAGCombinerInfo &DCI) { in tryCombineToEXTR() argument
3094 SelectionDAG &DAG = DCI.DAG; in tryCombineToEXTR()
3135 TargetLowering::DAGCombinerInfo &DCI, in PerformORCombine() argument
3138 SelectionDAG &DAG = DCI.DAG; in PerformORCombine()
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DAArch64ISelLowering.h253 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.h167 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
DXCoreISelLowering.cpp1362 DAGCombinerInfo &DCI) const { in PerformDAGCombine()
1363 SelectionDAG &DAG = DCI.DAG; in PerformDAGCombine()
1519 if (!DCI.isBeforeLegalize() || in PerformDAGCombine()
1531 ST->getMemoryVT().getTypeForEVT(*DCI.DAG.getContext())); in PerformDAGCombine()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp15523 TargetLowering::DAGCombinerInfo &DCI, in PerformShuffleCombine256() argument
15593 return DCI.CombineTo(N, InsV); in PerformShuffleCombine256()
15604 return DCI.CombineTo(N, InsV); in PerformShuffleCombine256()
15611 return DCI.CombineTo(N, InsV); in PerformShuffleCombine256()
15619 TargetLowering::DAGCombinerInfo &DCI, in PerformShuffleCombine() argument
15626 if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(VT.getVectorElementType())) in PerformShuffleCombine()
15632 return PerformShuffleCombine256(N, DAG, DCI, Subtarget); in PerformShuffleCombine()
15652 TargetLowering::DAGCombinerInfo &DCI, in PerformTruncateCombine() argument
15662 TargetLowering::DAGCombinerInfo &DCI) { in XFormVExtractWithShuffleIntoLoad() argument
15663 if (DCI.isBeforeLegalizeOps()) in XFormVExtractWithShuffleIntoLoad()
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DX86ISelLowering.h572 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/external/llvm/include/llvm/Target/
DTargetLowering.h1805 DAGCombinerInfo &DCI, SDLoc dl) const;
1825 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/
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