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Searched refs:Disp (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp127 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups); in getBDAddr12Encoding() local
128 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding()
129 return (Base << 12) | Disp; in getBDAddr12Encoding()
136 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups); in getBDAddr20Encoding() local
137 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding()
138 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12); in getBDAddr20Encoding()
145 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups); in getBDXAddr12Encoding() local
147 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding()
148 return (Index << 16) | (Base << 12) | Disp; in getBDXAddr12Encoding()
155 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups); in getBDXAddr20Encoding() local
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp57 int64_t Disp; member
62 : Form(form), DR(dr), Base(), Disp(0), Index(), in SystemZAddressingMode()
88 errs() << " Disp " << Disp; in dump()
152 SDValue &Base, SDValue &Disp);
154 SDValue &Base, SDValue &Disp, SDValue &Index);
160 SDValue &Base, SDValue &Disp);
167 SDValue &Base, SDValue &Disp, SDValue &Index);
179 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) { in selectBDAddr12Only() argument
180 return selectBDAddr(SystemZAddressingMode::Disp12Only, Addr, Base, Disp); in selectBDAddr12Only()
182 bool selectBDAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) { in selectBDAddr12Pair() argument
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DSystemZISelLowering.cpp1801 int64_t Disp = MI->getOperand(2).getImm(); in emitCondStore() local
1807 StoreOpcode = TII->getOpcodeForOffset(StoreOpcode, Disp); in emitCondStore()
1816 .addReg(SrcReg).addOperand(Base).addImm(Disp) in emitCondStore()
1844 .addReg(SrcReg).addOperand(Base).addImm(Disp).addReg(IndexReg); in emitCondStore()
1873 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadBinary() local
1889 LOpcode = TII->getOpcodeForOffset(LOpcode, Disp); in emitAtomicLoadBinary()
1890 CSOpcode = TII->getOpcodeForOffset(CSOpcode, Disp); in emitAtomicLoadBinary()
1912 .addOperand(Base).addImm(Disp).addReg(0); in emitAtomicLoadBinary()
1965 .addReg(OldVal).addReg(NewVal).addOperand(Base).addImm(Disp); in emitAtomicLoadBinary()
1995 int64_t Disp = MI->getOperand(2).getImm(); in emitAtomicLoadMinMax() local
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DSystemZOperands.td61 let Name = format##bitsize##"Disp"##dispsize##length;
85 "decode"##format##bitsize##"Disp"##dispsize##length##"Operand";
88 !cast<AddressAsmOperand>(format##bitsize##"Disp"##dispsize##length);
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp46 int16_t Disp; member
55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0), in MSP430ISelAddressMode()
71 errs() << " Disp " << Disp << '\n'; in dump()
123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
149 AM.Disp += G->getOffset(); in MatchWrapper()
154 AM.Disp += CP->getOffset(); in MatchWrapper()
191 AM.Disp += Val; in MatchAddress()
234 AM.Disp += Offset; in MatchAddress()
249 SDValue &Base, SDValue &Disp) { in SelectAddr() argument
267 Disp = CurDAG->getTargetGlobalAddress(AM.GV, SDLoc(N), in SelectAddr()
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DMSP430AsmPrinter.cpp114 const MachineOperand &Disp = MI->getOperand(OpNum+1); in printSrcMemOperand() local
119 if (Disp.isImm() && !Base.getReg()) in printSrcMemOperand()
/external/llvm/lib/Target/MSP430/InstPrinter/
DMSP430InstPrinter.cpp63 const MCOperand &Disp = MI->getOperand(OpNo+1); in printSrcMemOperand() local
76 if (Disp.isExpr()) in printSrcMemOperand()
77 O << *Disp.getExpr(); in printSrcMemOperand()
79 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
80 O << Disp.getImm(); in printSrcMemOperand()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h50 int Disp; member
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) { in X86AddressMode()
76 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags)); in getFullAddress()
78 MO.push_back(MachineOperand::CreateImm(Disp)); in getFullAddress()
135 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags); in addFullAddress()
137 MIB.addImm(AM.Disp); in addFullAddress()
DX86ISelDAGToDAG.cpp61 int32_t Disp; member
72 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0), in X86ISelAddressMode()
115 dbgs() << " Disp " << Disp << '\n' in dump()
196 SDValue &Scale, SDValue &Index, SDValue &Disp,
200 SDValue &Scale, SDValue &Index, SDValue &Disp,
203 SDValue &Scale, SDValue &Index, SDValue &Disp,
206 SDValue &Scale, SDValue &Index, SDValue &Disp,
210 SDValue &Index, SDValue &Disp,
216 SDValue &Index, SDValue &Disp,
229 SDValue &Disp, SDValue &Segment) { in getAddressOperands() argument
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DX86CodeEmitter.cpp88 intptr_t Disp = 0, intptr_t PCAdj = 0,
91 void emitConstPoolAddress(unsigned CPI, unsigned Reloc, intptr_t Disp = 0,
275 intptr_t Disp /* = 0 */, in emitGlobalAddress() argument
278 intptr_t RelocCST = Disp; in emitGlobalAddress()
292 MCE.emitDWordLE(Disp); in emitGlobalAddress()
294 MCE.emitWordLE((int32_t)Disp); in emitGlobalAddress()
324 intptr_t Disp /* = 0 */, in emitConstPoolAddress() argument
335 MCE.emitDWordLE(Disp); in emitConstPoolAddress()
337 MCE.emitWordLE((int32_t)Disp); in emitConstPoolAddress()
DX86FastISel.cpp406 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue(); in X86SelectAddress() local
408 if (isInt<32>(Disp)) { in X86SelectAddress()
409 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
420 uint64_t Disp = (int32_t)AM.Disp; in X86SelectAddress() local
431 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue()); in X86SelectAddress()
441 Disp += CI->getSExtValue() * S; in X86SelectAddress()
453 Disp += CI->getSExtValue() * S; in X86SelectAddress()
473 if (!isInt<32>(Disp)) in X86SelectAddress()
479 AM.Disp = (uint32_t)Disp; in X86SelectAddress()
1588 DestAM.Disp += Size; in TryEmitSmallMemcpy()
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/external/llvm/lib/Target/SystemZ/Disassembler/
DSystemZDisassembler.cpp188 uint64_t Disp = Field & 0xfff; in decodeBDAddr12Operand() local
191 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand()
198 uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff); in decodeBDAddr20Operand() local
201 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
209 uint64_t Disp = Field & 0xfff; in decodeBDXAddr12Operand() local
212 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand()
221 uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12); in decodeBDXAddr20Operand() local
224 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDXAddr20Operand()
233 uint64_t Disp = Field & 0xfff; in decodeBDLAddr12Len8Operand() local
236 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDLAddr12Len8Operand()
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp498 X86Operand *ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
511 X86Operand *CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
639 const MCExpr *Disp; member
693 return Mem.Disp; in getMemDisp()
963 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc, in CreateMem()
968 Res->Mem.Disp = Disp; in CreateMem()
980 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp, in CreateMem()
995 Res->Mem.Disp = Disp; in CreateMem()
1014 isa<MCConstantExpr>(Op.Mem.Disp) && in isSrcOp()
1015 cast<MCConstantExpr>(Op.Mem.Disp)->getValue() == 0 && in isSrcOp()
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/external/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp94 const MCExpr *Disp; member
151 const MCExpr *Disp, unsigned Index, in createMem() argument
158 Op->Mem.Disp = Disp; in createMem()
213 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12()
216 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
246 addExpr(Inst, Mem.Disp); in addBDAddrOperands()
252 addExpr(Inst, Mem.Disp); in addBDXAddrOperands()
259 addExpr(Inst, Mem.Disp); in addBDLAddrOperands()
317 bool parseAddress(unsigned &Base, const MCExpr *&Disp,
508 bool SystemZAsmParser::parseAddress(unsigned &Base, const MCExpr *&Disp, in parseAddress() argument
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/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h192 const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
194 switch (Disp.getType()) {
198 return addImm(Disp.getImm() + off);
205 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
207 return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
208 Disp.getTargetFlags());
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp102 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
370 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp); in EmitMemModRMByte() local
398 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind), in EmitMemModRMByte()
422 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups); in EmitMemModRMByte()
430 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) { in EmitMemModRMByte()
436 if (Disp.isImm()) { in EmitMemModRMByte()
437 if (!HasEVEX && isDisp8(Disp.getImm())) { in EmitMemModRMByte()
439 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups); in EmitMemModRMByte()
445 if (HasEVEX && isCDisp8(TSFlags, Disp.getImm(), CDisp8)) { in EmitMemModRMByte()
447 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups, in EmitMemModRMByte()
[all …]
/external/llvm/lib/Target/SystemZ/InstPrinter/
DSystemZInstPrinter.cpp21 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp, in printAddress() argument
23 O << Disp; in printAddress()
160 uint64_t Disp = MI->getOperand(OpNum + 1).getImm(); in printBDLAddrOperand() local
162 O << Disp << '(' << Length; in printBDLAddrOperand()
DSystemZInstPrinter.h34 static void printAddress(unsigned Base, int64_t Disp, unsigned Index,
/external/llvm/tools/llvm-objdump/
DCOFFDump.cpp219 uint64_t Offset, uint32_t Disp) { in printCOFFSymbolAddress() argument
226 if (Disp > 0) in printCOFFSymbolAddress()
227 Out << format(" + 0x%04x", Disp); in printCOFFSymbolAddress()
/external/libppp/src/
Dccp.h126 const char *(*Disp)(struct fsm_opt *); /* Use result immediately ! */ member
Dccp.c181 (*algorithm[ccp->in.algorithm]->Disp)(&ccp->in.opt)); in ccp_ReportStatus()
189 (*algorithm[ccp->out.algorithm]->Disp)(&(*o)->val)); in ccp_ReportStatus()
586 disp = f == -1 ? "" : (*algorithm[f]->Disp)(opt); in CcpDecodeConfig()
/external/llvm/tools/llvm-readobj/
DCOFFDumper.cpp478 uint64_t Offset, uint32_t Disp) { in formatSymbol() argument
489 if (Disp > 0) { in formatSymbol()
490 Str << format(" +0x%X (0x%" PRIX64 ")", Disp, Offset); in formatSymbol()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp117 bool SelectAddrImm(SDValue N, SDValue &Disp, in SelectAddrImm() argument
119 return PPCLowering.SelectAddressRegImm(N, Disp, Base, *CurDAG, false); in SelectAddrImm()
151 bool SelectAddrImmX4(SDValue N, SDValue &Disp, SDValue &Base) { in SelectAddrImmX4() argument
152 return PPCLowering.SelectAddressRegImm(N, Disp, Base, *CurDAG, true); in SelectAddrImmX4()
DPPCISelLowering.h369 bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base,
/external/llvm/lib/Target/ARM/
DARMConstantIslandPass.cpp294 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
298 bool isBBInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
318 unsigned Disp, bool NegativeOK, bool IsSoImm = false);

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