| /external/llvm/include/llvm/Target/ |
| D | TargetOpcodes.h | 27 INLINEASM = 1, enumerator
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| /external/llvm/test/CodeGen/PowerPC/ |
| D | 2009-07-16-InlineAsm-M-Operand.ll | 11 ; INLINEASM <es:fake $0>, 10, %R2, 20, -4, %R1
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ResourcePriorityQueue.cpp | 91 case ISD::INLINEASM: break; in numberRCValPredInSU()
128 case ISD::INLINEASM: break; in numberRCValSuccInSU()
463 case ISD::INLINEASM: in SUSchedulingCost()
567 case ISD::INLINEASM: in initNumRegDefsLeft()
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| D | InstrEmitter.cpp | 888 case ISD::INLINEASM: { in EmitSpecialNode()
895 TII->get(TargetOpcode::INLINEASM)); in EmitSpecialNode()
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| D | SelectionDAGDumper.cpp | 129 case ISD::INLINEASM: return "inlineasm"; in getOperationName()
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| D | SelectionDAGISel.cpp | 1617 SDValue New = CurDAG->getNode(ISD::INLINEASM, SDLoc(N), in Select_INLINEASM()
1754 UserOpcode == ISD::INLINEASM || in WalkChainUsers()
2181 case ISD::INLINEASM: return Select_INLINEASM(NodeToMatch); in SelectCodeCommon()
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| D | ScheduleDAGFast.cpp | 485 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
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| D | ScheduleDAGRRList.cpp | 686 case ISD::INLINEASM: in EmitNode()
1272 if (Node->getOpcode() == ISD::INLINEASM) { in DelayForLiveRegsBottomUp()
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| D | FastISel.cpp | 576 TII.get(TargetOpcode::INLINEASM)) in SelectCall()
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 509 INLINEASM, enumerator
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| D | MachineInstr.h | 644 bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; }
646 return getOpcode() == TargetOpcode::INLINEASM && getInlineAsmDialect();
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonMachineScheduler.cpp | 59 case TargetOpcode::INLINEASM: in isResourceAvailable()
114 case TargetOpcode::INLINEASM: in reserveResources()
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| D | HexagonISelLowering.cpp | 681 case ISD::INLINEASM: { in LowerINLINEASM()
1453 setOperationAction(ISD::INLINEASM , MVT::Other, Custom); in HexagonTargetLowering()
1568 case ISD::INLINEASM: return LowerINLINEASM(Op, DAG); in LowerOperation()
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| D | HexagonVLIWPacketizer.cpp | 1014 if (I->getOpcode() == Hexagon::INLINEASM) in isLegalToPacketizeTogether()
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| D | HexagonInstrInfo.cpp | 1174 case Hexagon::INLINEASM: in isValidOffset()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 269 case TargetOpcode::INLINEASM: { // Inline Asm: Variable size. in GetInstSizeInBytes()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.cpp | 305 case TargetOpcode::INLINEASM: { in GetInstSizeInBytes()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2InstrInfo.cpp | 432 if (Opcode == ARM::INLINEASM) in rewriteT2FrameIndex()
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| D | ARMCodeEmitter.cpp | 943 case TargetOpcode::INLINEASM: { in emitPseudoInstruction()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 668 else if (OpC != TargetOpcode::INLINEASM) { in eliminateFrameIndex()
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| D | PPCInstrInfo.cpp | 1360 case PPC::INLINEASM: { // Inline Asm: Variable size. in GetInstSizeInBytes()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 664 if (MI->getOpcode() == TargetOpcode::INLINEASM) { in getInstSizeInBytes()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 559 if (MI.getOpcode() == AArch64::INLINEASM) in getInstSizeInBytes()
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| /external/llvm/lib/Target/X86/ |
| D | X86CodeEmitter.cpp | 1177 case TargetOpcode::INLINEASM: in emitInstruction()
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| D | X86FloatingPoint.cpp | 1438 case TargetOpcode::INLINEASM: { in handleSpecialFP()
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