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Searched refs:MLI (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/CodeGen/
DDFAPacketizer.cpp108 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
116 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in DefaultVLIWScheduler() argument
118 ScheduleDAGInstrs(MF, MLI, MDT, IsPostRA) { in DefaultVLIWScheduler()
129 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in VLIWPacketizerList() argument
133 VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, MDT, IsPostRA); in VLIWPacketizerList()
DPHIElimination.cpp81 MachineLoopInfo *MLI);
139 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); in runOnMachineFunction() local
141 Changed |= SplitPHIEdges(MF, *I, MLI); in runOnMachineFunction()
546 MachineLoopInfo *MLI) { in SplitPHIEdges() argument
550 const MachineLoop *CurLoop = MLI ? MLI->getLoopFor(&MBB) : 0; in SplitPHIEdges()
567 const MachineLoop *PreLoop = MLI ? MLI->getLoopFor(PreMBB) : 0; in SplitPHIEdges()
DUnreachableBlockElim.cpp129 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); in runOnMachineFunction() local
148 if (MLI) MLI->removeBlock(BB); in runOnMachineFunction()
DPostRASchedulerList.cpp132 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
195 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in SchedulePostRATDList() argument
199 : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), AA(AA), in SchedulePostRATDList()
255 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
289 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode, in runOnMachineFunction()
DMachineBasicBlock.cpp921 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>()) in SplitCriticalEdge() local
922 if (MachineLoop *TIL = MLI->getLoopFor(this)) { in SplitCriticalEdge()
925 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { in SplitCriticalEdge()
928 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
931 TIL->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
934 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
943 P->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
DMachineBlockPlacement.cpp174 const MachineLoopInfo *MLI; member in __anon7c7745190311::MachineBlockPlacement
683 if (MachineLoop *ExitLoop = MLI->getLoopFor(*SI)) { in findBestLoopExit()
909 for (MachineLoopInfo::iterator LI = MLI->begin(), LE = MLI->end(); LI != LE; in buildCFGChains()
1065 MachineLoop *L = MLI->getLoopFor(*BI); in buildCFGChains()
1111 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
DMachineLICM.cpp74 MachineLoopInfo *MLI; // Current MachineLoopInfo member in __anon84e169da0111::MachineLICM
351 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
355 SmallVector<MachineLoop *, 8> Worklist(MLI->begin(), MLI->end()); in runOnMachineFunction()
511 const MachineLoop *ML = MLI->getLoopFor(BB); in HoistRegionPostRA()
705 const MachineLoop *ML = MLI->getLoopFor(BB); in HoistOutOfLoop()
DMachineScheduler.cpp74 MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) { in MachineSchedContext()
198 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
DScheduleDAGInstrs.cpp50 : ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()), LIS(lis), in ScheduleDAGInstrs()
/external/llvm/lib/Target/R600/
DAMDILCFGStructurizer.cpp163 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
164 DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI);); in runOnMachineFunction()
179 MachineLoopInfo *MLI; member in __anon4cec30e60311::AMDGPUCFGStructurizer
365 MachineLoop *LoopRep = MLI->getLoopFor(MBB); in hasBackEdge()
384 MachineLoop *LoopRep = MLI->getLoopFor(MBB); in isActiveLoophead()
752 for (MachineLoopInfo::iterator It = MLI->begin(), in prepare()
753 E = MLI->end(); It != E; ++It) { in prepare()
1076 for (MachineLoopInfo::iterator It = MLI->begin(), E = MLI->end(); in loopendPatternMatch()
1140 MLI->changeLoopFor(LoopHeader, ParentLoop); in mergeLoop()
1142 MLI->removeBlock(LoopHeader); in mergeLoop()
[all …]
DR600Packetizer.cpp141 R600PacketizerList(MachineFunction &MF, MachineLoopInfo &MLI, in R600PacketizerList() argument
143 : VLIWPacketizerList(MF, MLI, MDT, true), in R600PacketizerList()
287 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
291 R600PacketizerList Packetizer(Fn, MLI, MDT); in runOnMachineFunction()
/external/llvm/include/llvm/CodeGen/
DMachineScheduler.h51 const MachineLoopInfo *MLI; member
255 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS), in ScheduleDAGMI()
DDFAPacketizer.h111 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
DScheduleDAGInstrs.h71 const MachineLoopInfo &MLI;
/external/llvm/lib/Target/Hexagon/
DHexagonVLIWPacketizer.cpp120 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
186 MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT, in INITIALIZE_PASS_DEPENDENCY()
188 : VLIWPacketizerList(MF, MLI, MDT, true){ in INITIALIZE_PASS_DEPENDENCY()
194 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
199 HexagonPacketizerList Packetizer(Fn, MLI, MDT, MBPI); in runOnMachineFunction()
DHexagonHardwareLoops.cpp64 MachineLoopInfo *MLI; member
301 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
308 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end(); in runOnMachineFunction()
DHexagonMachineScheduler.cpp148 << " at loop depth " << MLI.getLoopDepth(BB) in schedule()
/external/icu4c/data/locales/
Dmua.txt171 "MLI",
/external/oprofile/events/ia64/itanium2/
Dunit_masks458 0x8 MLI
/external/icu4c/data/misc/
Dmetadata.txt1011 MLI{"ML"}
DsupplementalData.txt965 "MLI",