/external/clang/lib/CodeGen/ |
D | CGBuiltin.cpp | 1629 Value *CodeGenFunction::EmitNeonCall(Function *F, SmallVectorImpl<Value*> &Ops, in EmitNeonCall() argument 1636 Ops[j] = EmitNeonShiftVector(Ops[j], ai->getType(), rightshift); in EmitNeonCall() 1638 Ops[j] = Builder.CreateBitCast(Ops[j], ai->getType(), name); in EmitNeonCall() 1640 return Builder.CreateCall(F, Ops, name); in EmitNeonCall() 1714 SmallVector<Value *, 2> Ops; in EmitAArch64BuiltinExpr() local 1716 Ops.push_back(EmitScalarExpr(E->getArg(i))); in EmitAArch64BuiltinExpr() 1720 return EmitNounwindRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name), Ops); in EmitAArch64BuiltinExpr() 1723 SmallVector<Value *, 4> Ops; in EmitAArch64BuiltinExpr() local 1725 Ops.push_back(EmitScalarExpr(E->getArg(i))); in EmitAArch64BuiltinExpr() 1780 std::swap(Ops[0], Ops[1]); in EmitAArch64BuiltinExpr() [all …]
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D | CGExprScalar.cpp | 407 Value *EmitMul(const BinOpInfo &Ops) { in EmitMul() argument 408 if (Ops.Ty->isSignedIntegerOrEnumerationType()) { in EmitMul() 411 return Builder.CreateMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul() 414 return Builder.CreateNSWMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul() 417 return EmitOverflowCheckedBinOp(Ops); in EmitMul() 421 if (Ops.Ty->isUnsignedIntegerType() && CGF.SanOpts->UnsignedIntegerOverflow) in EmitMul() 422 return EmitOverflowCheckedBinOp(Ops); in EmitMul() 424 if (Ops.LHS->getType()->isFPOrFPVectorTy()) in EmitMul() 425 return Builder.CreateFMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul() 426 return Builder.CreateMul(Ops.LHS, Ops.RHS, "mul"); in EmitMul() [all …]
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/external/llvm/lib/Transforms/Scalar/ |
D | Reassociate.cpp | 64 static void PrintOps(Instruction *I, const SmallVectorImpl<ValueEntry> &Ops) { in PrintOps() argument 67 << *Ops[0].Op->getType() << '\t'; in PrintOps() 68 for (unsigned i = 0, e = Ops.size(); i != e; ++i) { in PrintOps() 70 WriteAsOperand(dbgs(), Ops[i].Op, false, M); in PrintOps() 71 dbgs() << ", #" << Ops[i].Rank << "] "; in PrintOps() 180 void RewriteExprTree(BinaryOperator *I, SmallVectorImpl<ValueEntry> &Ops); 182 SmallVectorImpl<ValueEntry> &Ops); 183 Value *OptimizeAdd(Instruction *I, SmallVectorImpl<ValueEntry> &Ops); 184 Value *OptimizeXor(Instruction *I, SmallVectorImpl<ValueEntry> &Ops); 189 bool collectMultiplyFactors(SmallVectorImpl<ValueEntry> &Ops, [all …]
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/external/llvm/include/llvm/IR/ |
D | MDBuilder.h | 130 Value *Ops[3] = { createString(Name), Parent, Flags }; variable 131 return MDNode::get(Context, Ops); 133 Value *Ops[2] = { createString(Name), Parent }; variable 134 return MDNode::get(Context, Ops); 163 SmallVector<Value *, 4> Ops(Fields.size() * 2 + 1); in createTBAAStructTypeNode() 165 Ops[0] = createString(Name); in createTBAAStructTypeNode() 167 Ops[i * 2 + 1] = Fields[i].first; in createTBAAStructTypeNode() 168 Ops[i * 2 + 2] = ConstantInt::get(Int64, Fields[i].second); in createTBAAStructTypeNode() 170 return MDNode::get(Context, Ops); in createTBAAStructTypeNode() 177 SmallVector<Value *, 4> Ops(3); [all …]
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/external/llvm/lib/Analysis/ |
D | ScalarEvolution.cpp | 639 static void GroupByComplexity(SmallVectorImpl<const SCEV *> &Ops, in GroupByComplexity() argument 641 if (Ops.size() < 2) return; // Noop in GroupByComplexity() 642 if (Ops.size() == 2) { in GroupByComplexity() 645 const SCEV *&LHS = Ops[0], *&RHS = Ops[1]; in GroupByComplexity() 652 std::stable_sort(Ops.begin(), Ops.end(), SCEVComplexityCompare(LI)); in GroupByComplexity() 658 for (unsigned i = 0, e = Ops.size(); i != e-2; ++i) { in GroupByComplexity() 659 const SCEV *S = Ops[i]; in GroupByComplexity() 664 for (unsigned j = i+1; j != e && Ops[j]->getSCEVType() == Complexity; ++j) { in GroupByComplexity() 665 if (Ops[j] == S) { // Found a duplicate. in GroupByComplexity() 667 std::swap(Ops[i+1], Ops[j]); in GroupByComplexity() [all …]
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D | ConstantFolding.cpp | 102 Constant *Ops = C; // don't take the address of C! in FoldBitCast() local 103 return FoldBitCast(ConstantVector::get(Ops), DestTy, TD); in FoldBitCast() 600 static Constant *CastGEPIndices(ArrayRef<Constant *> Ops, in CastGEPIndices() argument 608 for (unsigned i = 1, e = Ops.size(); i != e; ++i) { in CastGEPIndices() 610 !isa<StructType>(GetElementPtrInst::getIndexedType(Ops[0]->getType(), in CastGEPIndices() 611 Ops.slice(1, i-1)))) && in CastGEPIndices() 612 Ops[i]->getType() != IntPtrTy) { in CastGEPIndices() 614 NewIdxs.push_back(ConstantExpr::getCast(CastInst::getCastOpcode(Ops[i], in CastGEPIndices() 618 Ops[i], IntPtrTy)); in CastGEPIndices() 620 NewIdxs.push_back(Ops[i]); in CastGEPIndices() [all …]
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D | ScalarEvolutionExpander.cpp | 309 static void SimplifyAddOperands(SmallVectorImpl<const SCEV *> &Ops, in SimplifyAddOperands() argument 313 for (unsigned i = Ops.size(); i > 0 && isa<SCEVAddRecExpr>(Ops[i-1]); --i) in SimplifyAddOperands() 316 SmallVector<const SCEV *, 8> NoAddRecs(Ops.begin(), Ops.end() - NumAddRecs); in SimplifyAddOperands() 317 SmallVector<const SCEV *, 8> AddRecs(Ops.end() - NumAddRecs, Ops.end()); in SimplifyAddOperands() 324 Ops.clear(); in SimplifyAddOperands() 326 Ops.append(Add->op_begin(), Add->op_end()); in SimplifyAddOperands() 328 Ops.push_back(Sum); in SimplifyAddOperands() 330 Ops.append(AddRecs.begin(), AddRecs.end()); in SimplifyAddOperands() 338 static void SplitAddRecs(SmallVectorImpl<const SCEV *> &Ops, in SplitAddRecs() argument 343 for (unsigned i = 0, e = Ops.size(); i != e; ++i) in SplitAddRecs() [all …]
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMUnwindOpAsm.h | 30 llvm::SmallVector<uint8_t, 32> Ops; 42 Ops.clear(); in Reset() 71 Ops.push_back(Opcode & 0xff); in EmitInt8() 76 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16() 77 Ops.push_back(Opcode & 0xff); in EmitInt16() 82 Ops.insert(Ops.end(), Opcode, Opcode + Size); in EmitBytes()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelDAGToDAG.cpp | 139 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local 142 Ops); in Select() 145 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local 148 Ops); in Select() 151 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local 154 Ops); in Select() 157 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local 160 Ops); in Select() 163 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local 166 Ops); in Select() [all …]
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/external/llvm/lib/IR/ |
D | IRBuilder.cpp | 55 static CallInst *createCallHelper(Value *Callee, ArrayRef<Value *> Ops, in createCallHelper() argument 57 CallInst *CI = CallInst::Create(Callee, Ops, ""); in createCallHelper() 67 Value *Ops[] = { Ptr, Val, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemSet() local 72 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemSet() 87 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemCpy() local 92 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemCpy() 111 Value *Ops[] = { Dst, Src, Size, getInt32(Align), getInt1(isVolatile) }; in CreateMemMove() local 116 CallInst *CI = createCallHelper(TheFn, Ops, this); in CreateMemMove() 134 Value *Ops[] = { Size, Ptr }; in CreateLifetimeStart() local 137 return createCallHelper(TheFn, Ops, this); in CreateLifetimeStart() [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 1512 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local 1515 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad() 1519 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local 1522 MVT::i32, MVT::Other, Ops); in SelectARMIndexedLoad() 1568 SDValue Ops[]= { Base, Offset, getAL(CurDAG), in SelectT2IndexedLoad() local 1571 MVT::Other, Ops); in SelectT2IndexedLoad() 1584 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local 1585 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createGPRPairNode() 1595 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local 1596 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createSRegPairNode() [all …]
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/external/clang/test/CodeGenCXX/ |
D | mangle.cpp | 274 struct Ops { struct 275 Ops& operator+(const Ops&); 276 Ops& operator-(const Ops&); 277 Ops& operator&(const Ops&); 278 Ops& operator*(const Ops&); 284 Ops& Ops::operator+(const Ops&) { return *this; } in operator +() argument 286 Ops& Ops::operator-(const Ops&) { return *this; } in operator -() argument 288 Ops& Ops::operator&(const Ops&) { return *this; } in operator &() argument 290 Ops& Ops::operator*(const Ops&) { return *this; } in operator *() argument
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelDAGToDAG.cpp | 244 std::vector<SDValue> Ops; in Select() local 247 Ops.push_back(CurDAG->getRegister(AMDGPU::ALU_CONST, MVT::f32)); in Select() 249 Ops.push_back(CstOffset); in Select() 251 Ops.push_back(I->getOperand(i)); in Select() 254 CurDAG->UpdateNodeOperands(*I, Ops.data(), Ops.size()); in Select() 311 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0, in Select() local 314 SDLoc(N), N->getValueType(0), Ops); in Select() 362 std::vector<SDValue> Ops; in Select() local 364 Ops.push_back(Use->getOperand(i)); in Select() 406 Ops[ImmIdx] = CurDAG->getTargetConstant(ImmValue, MVT::i32); in Select() [all …]
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D | SIISelLowering.cpp | 453 SmallVector<SDValue, 4> Ops; in LowerBRCOND() local 454 Ops.push_back(BRCOND.getOperand(0)); in LowerBRCOND() 456 Ops.push_back(Intr->getOperand(i)); in LowerBRCOND() 457 Ops.push_back(Target); in LowerBRCOND() 462 DAG.getVTList(Res.data(), Res.size()), Ops.data(), Ops.size()).getNode(); in LowerBRCOND() 466 SDValue Ops[] = { in LowerBRCOND() local 470 DAG.MorphNodeTo(BR, ISD::BR, BR->getVTList(), Ops, 2); in LowerBRCOND() 772 static bool isNodeChanged(const SDNode *Node, const std::vector<SDValue> &Ops) { in isNodeChanged() argument 774 if (Ops[i].getNode() != Node->getOperand(i).getNode()) { in isNodeChanged() 838 std::vector<SDValue> Ops; in foldOperands() local [all …]
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/external/llvm/include/llvm/Analysis/ |
D | ScalarEvolution.h | 585 const SCEV *getAddExpr(SmallVectorImpl<const SCEV *> &Ops, 589 SmallVector<const SCEV *, 2> Ops; 590 Ops.push_back(LHS); 591 Ops.push_back(RHS); 592 return getAddExpr(Ops, Flags); 596 SmallVector<const SCEV *, 3> Ops; 597 Ops.push_back(Op0); 598 Ops.push_back(Op1); 599 Ops.push_back(Op2); 600 return getAddExpr(Ops, Flags); [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 700 const SDValue *Ops, unsigned NumOps) 709 OperandList[i].setInitial(Ops[i]); 723 void InitOperands(SDUse *Ops, const SDValue &Op0) { 724 Ops[0].setUser(this); 725 Ops[0].setInitial(Op0); 727 OperandList = Ops; 732 void InitOperands(SDUse *Ops, const SDValue &Op0, const SDValue &Op1) { 733 Ops[0].setUser(this); 734 Ops[0].setInitial(Op0); 735 Ops[1].setUser(this); [all …]
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D | SelectionDAG.h | 452 SDValue Ops[] = { Chain, getRegister(Reg, N.getValueType()), N, Glue }; 453 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3); 460 SDValue Ops[] = { Chain, Reg, N, Glue }; 461 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3); 466 SDValue Ops[] = { Chain, getRegister(Reg, VT) }; 467 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2); 476 SDValue Ops[] = { Chain, getRegister(Reg, VT), Glue }; 477 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2); 519 SDValue Ops[] = { Chain, Op }; 520 return getNode(ISD::CALLSEQ_START, DL, VTs, Ops, 2); [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 338 const SDValue *Ops, unsigned NumOps) { in AddNodeIDOperands() argument 339 for (; NumOps; --NumOps, ++Ops) { in AddNodeIDOperands() 340 ID.AddPointer(Ops->getNode()); in AddNodeIDOperands() 341 ID.AddInteger(Ops->getResNo()); in AddNodeIDOperands() 348 const SDUse *Ops, unsigned NumOps) { in AddNodeIDOperands() argument 349 for (; NumOps; --NumOps, ++Ops) { in AddNodeIDOperands() 350 ID.AddPointer(Ops->getNode()); in AddNodeIDOperands() 351 ID.AddInteger(Ops->getResNo()); in AddNodeIDOperands() 738 SDValue Ops[] = { Op }; in FindModifiedNodeSlot() local 740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1); in FindModifiedNodeSlot() [all …]
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D | LegalizeVectorTypes.cpp | 415 SmallVector<SDValue, 1> Ops(1); in ScalarizeVecOp_EXTEND() local 416 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N), in ScalarizeVecOp_EXTEND() 421 &Ops[0], 1); in ScalarizeVecOp_EXTEND() 427 SmallVector<SDValue, 8> Ops(N->getNumOperands()); in ScalarizeVecOp_CONCAT_VECTORS() local 429 Ops[i] = GetScalarizedVector(N->getOperand(i)); in ScalarizeVecOp_CONCAT_VECTORS() 431 &Ops[0], Ops.size()); in ScalarizeVecOp_CONCAT_VECTORS() 929 SmallVector<int, 16> Ops; in SplitVecRes_VECTOR_SHUFFLE() local 949 Ops.push_back(-1); in SplitVecRes_VECTOR_SHUFFLE() 977 Ops.push_back(Idx + OpNo * NewElts); in SplitVecRes_VECTOR_SHUFFLE() 1018 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]); in SplitVecRes_VECTOR_SHUFFLE() [all …]
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/external/llvm/lib/Transforms/Utils/ |
D | ValueMapper.cpp | 148 SmallVector<Constant*, 8> Ops; in MapValue() local 149 Ops.reserve(NumOperands); in MapValue() 151 Ops.push_back(cast<Constant>(C->getOperand(j))); in MapValue() 155 Ops.push_back(cast<Constant>(Mapped)); in MapValue() 159 Ops.push_back(MapValue(cast<Constant>(C->getOperand(OpNo)), VM, in MapValue() 164 return VM[V] = CE->getWithOperands(Ops, NewTy); in MapValue() 166 return VM[V] = ConstantArray::get(cast<ArrayType>(NewTy), Ops); in MapValue() 168 return VM[V] = ConstantStruct::get(cast<StructType>(NewTy), Ops); in MapValue() 170 return VM[V] = ConstantVector::get(Ops); in MapValue()
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/external/llvm/lib/CodeGen/ |
D | IntrinsicLowering.cpp | 469 Value *Ops[3]; in LowerIntrinsicCall() local 470 Ops[0] = CI->getArgOperand(0); in LowerIntrinsicCall() 471 Ops[1] = CI->getArgOperand(1); in LowerIntrinsicCall() 472 Ops[2] = Size; in LowerIntrinsicCall() 473 ReplaceCallWith("memcpy", CI, Ops, Ops+3, CI->getArgOperand(0)->getType()); in LowerIntrinsicCall() 480 Value *Ops[3]; in LowerIntrinsicCall() local 481 Ops[0] = CI->getArgOperand(0); in LowerIntrinsicCall() 482 Ops[1] = CI->getArgOperand(1); in LowerIntrinsicCall() 483 Ops[2] = Size; in LowerIntrinsicCall() 484 ReplaceCallWith("memmove", CI, Ops, Ops+3, CI->getArgOperand(0)->getType()); in LowerIntrinsicCall() [all …]
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D | TargetInstrInfo.cpp | 340 const SmallVectorImpl<unsigned> &Ops) const { in canFoldMemoryOperand() 341 return MI->isCopy() && Ops.size() == 1 && canFoldCopy(MI, Ops[0]); in canFoldMemoryOperand() 352 const SmallVectorImpl<unsigned> &Ops, in foldMemoryOperand() argument 355 for (unsigned i = 0, e = Ops.size(); i != e; ++i) in foldMemoryOperand() 356 if (MI->getOperand(Ops[i]).isDef()) in foldMemoryOperand() 366 if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) { in foldMemoryOperand() 387 if (!MI->isCopy() || Ops.size() != 1) in foldMemoryOperand() 390 const TargetRegisterClass *RC = canFoldCopy(MI, Ops[0]); in foldMemoryOperand() 394 const MachineOperand &MO = MI->getOperand(1-Ops[0]); in foldMemoryOperand() 410 const SmallVectorImpl<unsigned> &Ops, in foldMemoryOperand() argument [all …]
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 277 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local 280 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad() 306 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local 309 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad() 360 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local 363 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad() 412 SDValue Ops[] = { getI32Imm(isVolatile), getI32Imm(codeAddrSpace), in SelectLoad() local 415 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops); in SelectLoad() 538 SDValue Ops[] = { getI32Imm(IsVolatile), getI32Imm(CodeAddrSpace), in SelectLoadVector() local 541 LD = CurDAG->getMachineNode(Opcode, DL, N->getVTList(), Ops); in SelectLoadVector() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86SelectionDAGInfo.cpp | 143 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemset() local 144 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops)); in EmitTargetCodeForMemset() 157 SDValue Ops[] = { Chain, DAG.getValueType(MVT::i8), InFlag }; in EmitTargetCodeForMemset() local 158 Chain = DAG.getNode(X86ISD::REP_STOS, dl, Tys, Ops, array_lengthof(Ops)); in EmitTargetCodeForMemset() 245 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; in EmitTargetCodeForMemcpy() local 246 SDValue RepMovs = DAG.getNode(X86ISD::REP_MOVS, dl, Tys, Ops, in EmitTargetCodeForMemcpy() 247 array_lengthof(Ops)); in EmitTargetCodeForMemcpy()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 461 SDValue Ops[] = { Op0, Op1, getI32Imm(SH), getI32Imm(MB), in SelectBitfieldInsert() local 463 return CurDAG->getMachineNode(PPC::RLWIMI, dl, MVT::i32, Ops); in SelectBitfieldInsert() 728 SDValue Ops[] = { Op, getI32Imm(27), getI32Imm(5), getI32Imm(31) }; in SelectSETCC() local 729 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC() 740 SDValue Ops[] = { Op, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local 741 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC() 747 SDValue Ops[] = { T, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local 748 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC() 777 SDValue Ops[] = { AN, getI32Imm(1), getI32Imm(31), getI32Imm(31) }; in SelectSETCC() local 778 return CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops, 4); in SelectSETCC() [all …]
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