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Searched refs:Pred1 (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Transforms/Utils/
DBasicBlockUtils.cpp681 BasicBlock *Pred1 = NULL; in GetIfCondition() local
687 Pred1 = SomePHI->getIncomingBlock(0); in GetIfCondition()
693 Pred1 = *PI++; in GetIfCondition()
703 BranchInst *Pred1Br = dyn_cast<BranchInst>(Pred1->getTerminator()); in GetIfCondition()
718 std::swap(Pred1, Pred2); in GetIfCondition()
733 IfTrue = Pred1; in GetIfCondition()
738 IfFalse = Pred1; in GetIfCondition()
751 BasicBlock *CommonPred = Pred1->getSinglePredecessor(); in GetIfCondition()
760 if (BI->getSuccessor(0) == Pred1) { in GetIfCondition()
761 IfTrue = Pred1; in GetIfCondition()
[all …]
DSimplifyCFG.cpp1138 BasicBlock *Pred1 = *PI++; in SinkThenElseCodeToEnd() local
1141 BasicBlock *BB2 = (Pred0 == BB1) ? Pred1 : Pred0; in SinkThenElseCodeToEnd()
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DR600InstrInfo.h97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.h117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.cpp214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DR600InstrInfo.cpp447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/mesa3d/src/gallium/drivers/radeon/
DR600InstrInfo.h97 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.h117 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DAMDGPUInstrInfo.cpp214 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DR600InstrInfo.cpp447 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h194 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DPPCInstrInfo.cpp978 const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
980 assert(Pred1.size() == 2 && "Invalid PPC first predicate"); in SubsumesPredicate()
983 if (Pred1[1].getReg() == PPC::CTR8 || Pred1[1].getReg() == PPC::CTR) in SubsumesPredicate()
988 PPC::Predicate P1 = (PPC::Predicate) Pred1[0].getImm(); in SubsumesPredicate()
/external/llvm/lib/Target/R600/
DAMDGPUInstrInfo.cpp194 AMDGPUInstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
DAMDGPUInstrInfo.h119 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DR600InstrInfo.h171 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DR600InstrInfo.cpp929 R600InstrInfo::SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h141 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DHexagonInstrInfo.cpp1049 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.h88 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1,
DARMBaseInstrInfo.cpp475 SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument
477 if (Pred1.size() > 2 || Pred2.size() > 2) in SubsumesPredicate()
480 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate()
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h670 bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, in SubsumesPredicate() argument