Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
73 PrefReg, ///< Block entry/exit prefers a register. enumerator
137 case PrefReg: in addBias()
770 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()771 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()992 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()994 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()
351 void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument353 RegAllocHints[Reg].second = PrefReg; in setRegAllocationHint()