| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 211 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
213 { ISD::SIGN_EXTEND, MVT::v2i64, MVT::v2i32, 1 }, in getCastInstrCost()
219 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 }, in getCastInstrCost()
221 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 }, in getCastInstrCost()
223 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 }, in getCastInstrCost()
225 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 }, in getCastInstrCost()
227 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, in getCastInstrCost()
361 { ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 2 }, in getCastInstrCost()
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| D | ARMISelLowering.cpp | 568 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i32, Custom); in ARMTargetLowering()
570 setOperationAction(ISD::SIGN_EXTEND, MVT::v4i64, Custom); in ARMTargetLowering()
572 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i32, Custom); in ARMTargetLowering()
574 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i64, Custom); in ARMTargetLowering()
597 setTargetDAGCombine(ISD::SIGN_EXTEND); in ARMTargetLowering()
1471 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
3475 CastOpc = ISD::SIGN_EXTEND; in LowerVectorINT_TO_FP()
5357 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N)) in isSignExtended()
5442 if (N->getOpcode() == ISD::SIGN_EXTEND || N->getOpcode() == ISD::ZERO_EXTEND) in SkipExtensionForVMULL()
5581 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
[all …]
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 405 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i16, 1 }, in getCastInstrCost()
407 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i32, 1 }, in getCastInstrCost()
441 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i1, 9 }, in getCastInstrCost()
442 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i1, 8 }, in getCastInstrCost()
443 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i8, 6 }, in getCastInstrCost()
444 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 6 }, in getCastInstrCost()
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| D | X86FastISel.cpp | 807 ISD::SIGN_EXTEND; in X86SelectRet()
2011 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), in DoSelectCall()
2035 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), in DoSelectCall()
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| D | X86ISelLowering.cpp | 858 setOperationAction(ISD::SIGN_EXTEND, VT, Expand); in resetOperationActions()
1194 setOperationAction(ISD::SIGN_EXTEND, MVT::v4i64, Custom); in resetOperationActions()
1195 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i32, Custom); in resetOperationActions()
1350 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i32, Custom); in resetOperationActions()
1351 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i64, Custom); in resetOperationActions()
1352 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i8, Custom); in resetOperationActions()
1353 setOperationAction(ISD::SIGN_EXTEND, MVT::v8i16, Custom); in resetOperationActions()
1354 setOperationAction(ISD::SIGN_EXTEND, MVT::v16i16, Custom); in resetOperationActions()
1516 setTargetDAGCombine(ISD::SIGN_EXTEND); in resetOperationActions()
1800 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); in LowerReturn()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 354 SIGN_EXTEND, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 765 Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteOperand()
1142 case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N); in visit()
1218 case ISD::SIGN_EXTEND: in combine()
1542 if (N0.getOpcode() == ISD::SIGN_EXTEND && in visitADD()
1544 !TLI.isOperationLegal(ISD::SIGN_EXTEND, MVT::i1)) { in visitADD()
2161 N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0); in visitMULHS()
2162 N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); in visitMULHS()
2279 SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0)); in visitSMUL_LOHI()
2280 SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1)); in visitSMUL_LOHI()
2379 N0.getOpcode() == ISD::SIGN_EXTEND || in SimplifyBinOpWithSameOpcodeHands()
[all …]
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| D | LegalizeVectorOps.cpp | 225 case ISD::SIGN_EXTEND: in LegalizeOp()
364 ISD::SIGN_EXTEND; in PromoteVectorOpINT_TO_FP()
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| D | LegalizeFloatTypes.cpp | 584 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, in SoftenFloatRes_XINT_TO_FP()
1167 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, in ExpandFloatRes_XINT_TO_FP()
1175 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl, in ExpandFloatRes_XINT_TO_FP()
1179 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src); in ExpandFloatRes_XINT_TO_FP()
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| D | LegalizeVectorTypes.cpp | 89 case ISD::SIGN_EXTEND: in ScalarizeVectorResult()
371 case ISD::SIGN_EXTEND: in ScalarizeVectorOperand()
546 case ISD::SIGN_EXTEND: in SplitVectorResult()
1077 case ISD::SIGN_EXTEND: in SplitVectorOperand()
1487 case ISD::SIGN_EXTEND: in WidenVectorResult()
2269 case ISD::SIGN_EXTEND: in WidenVectorOperand()
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| D | SelectionDAGDumper.cpp | 211 case ISD::SIGN_EXTEND: return "sign_extend"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 93 case ISD::SIGN_EXTEND: in PromoteIntegerResult()
289 unsigned Opc = VT.isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in PromoteIntRes_Constant()
398 if (N->getOpcode() == ISD::SIGN_EXTEND) in PromoteIntRes_INT_EXTEND()
797 case ISD::SIGN_EXTEND: Res = PromoteIntOp_SIGN_EXTEND(N); break; in PromoteIntegerOperand()
1123 case ISD::SIGN_EXTEND: ExpandIntRes_SIGN_EXTEND(N, Lo, Hi); break; in ExpandIntegerResult()
2173 Lo = DAG.getNode(ISD::SIGN_EXTEND, dl, NVT, N->getOperand(0)); in ExpandIntRes_SIGN_EXTEND()
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| D | FastISel.cpp | 298 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND, in getRegForGEPIndex()
1063 return SelectCast(I, ISD::SIGN_EXTEND); in SelectOperator()
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| D | SelectionDAG.cpp | 925 getNode(ISD::SIGN_EXTEND, DL, VT, Op) : in getSExtOrTrunc()
1942 case ISD::SIGN_EXTEND: { in ComputeMaskedBits()
2152 case ISD::SIGN_EXTEND: in ComputeNumSignBits()
2431 case ISD::SIGN_EXTEND: in getNode()
2542 case ISD::SIGN_EXTEND: in getNode()
2552 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND) in getNode()
2586 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
2612 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND || in getNode()
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| /external/llvm/lib/Target/R600/ |
| D | AMDILISelLowering.cpp | 167 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
181 setOperationAction(ISD::SIGN_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
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| D | SIISelLowering.cpp | 81 setOperationAction(ISD::SIGN_EXTEND, MVT::i64, Custom); in SITargetLowering()
349 case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG); in LowerOperation()
581 && Arg0.getOpcode() == ISD::SIGN_EXTEND in PerformDAGCombine()
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 183 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
198 setOperationAction(ISD::SIGN_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
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| D | SIISelLowering.cpp | 424 && Arg0.getOpcode() == ISD::SIGN_EXTEND in PerformDAGCombine()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 183 setOperationAction(ISD::SIGN_EXTEND, MVT::v2i64, Expand); in InitAMDILLowering()
198 setOperationAction(ISD::SIGN_EXTEND, MVT::v2f64, Expand); in InitAMDILLowering()
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| D | SIISelLowering.cpp | 424 && Arg0.getOpcode() == ISD::SIGN_EXTEND in PerformDAGCombine()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 850 if (MulOp0.getOpcode() == ISD::SIGN_EXTEND) { in SelectMul()
876 if (MulOp1.getOpcode() == ISD::SIGN_EXTEND) { in SelectMul()
1030 if (MulOp0.getOpcode() == ISD::SIGN_EXTEND) { in SelectTruncate()
1056 if (MulOp1.getOpcode() == ISD::SIGN_EXTEND) { in SelectTruncate()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 118 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Custom); in MSP430TargetLowering()
199 case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG); in LowerOperation()
499 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1136 ExtendKind = ISD::SIGN_EXTEND; in GetReturnInfo()
1221 case SExt: return ISD::SIGN_EXTEND; in InstructionOpcodeToISD()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 268 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
731 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_32()
1032 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall_64()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 471 if (IndexOpcode == ISD::SIGN_EXTEND || in shouldUseLA()
|