Searched refs:SSE1 (Results 1 – 14 of 14) sorted by relevance
| /external/llvm/test/CodeGen/X86/ |
| D | memcpy-2.ll | 3 …llc < %s -mattr=+sse,-sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE1
26 ; SSE1-LABEL: t1:
27 ; SSE1: movaps _.str, %xmm0
28 ; SSE1: movaps %xmm0
29 ; SSE1: movb $0, 24(%esp)
30 ; SSE1: movl $0, 20(%esp)
31 ; SSE1: movl $0, 16(%esp)
66 ; SSE1-LABEL: t2:
67 ; SSE1: movaps (%eax), %xmm0
68 ; SSE1: movaps %xmm0, (%eax)
[all …]
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| D | memset-sse-stack-realignment.ll | 5 ; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s -check-prefix=SSE1
21 ; SSE1-LABEL: test1:
22 ; SSE1: andl $-16
23 ; SSE1: movl %esp, %esi
24 ; SSE1: movaps
54 ; SSE1-LABEL: test2:
55 ; SSE1: andl $-16
56 ; SSE1: movl %esp, %esi
57 ; SSE1: movaps
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| D | sse1.ll | 1 ; Tests for SSE1 and below, without SSE2+.
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| /external/llvm/lib/Target/X86/ |
| D | X86Subtarget.h | 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512 enumerator
253 bool hasSSE1() const { return X86SSELevel >= SSE1; } in hasSSE1()
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| D | X86.td | 39 def FeatureSSE1 : SubtargetFeature<"sse", "X86SSELevel", "SSE1",
42 // SSE1+ processors support them.
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| D | X86InstrFormats.td | 391 // SSE1 Instruction Templates:
393 // SSI - SSE1 instructions with XS prefix.
394 // PSI - SSE1 instructions with TB prefix.
395 // PSIi8 - SSE1 instructions with ImmT == Imm8 and TB prefix.
396 // VSSI - SSE1 instructions with XS prefix in AVX form.
397 // VPSI - SSE1 instructions with TB prefix in AVX form, packed single.
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| D | X86Subtarget.cpp | 209 if ((EDX >> 25) & 1) { X86SSELevel = SSE1; ToggleFeature(X86::FeatureSSE1); } in AutoDetectSubtargetFeatures()
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| D | X86InstrFPStack.td | 121 // f32 instructions can use SSE1 and are predicated on FPStackf32 == !SSE1.
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| D | X86InstrSSE.td | 493 // SSE1 & 2
2871 // SSE1, but only on SSE2.
3076 /// sse1_fp_unop_s - SSE1 unops in scalar form.
3122 /// sse1_fp_unop_s_rw - SSE1 unops where vector form has a read-write operand.
3171 /// sse1_fp_unop_p - SSE1 unops in packed form.
3207 /// sse1_fp_unop_p_int - SSE1 intrinsics unops in packed forms.
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| D | X86InstrCompiler.td | 475 // SSE1.
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| /external/clang/lib/Basic/ |
| D | Targets.cpp | 1573 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2 enumerator
2355 .Case("sse", SSE1) in HandleTargetFeatures()
2586 case SSE1: in getTargetDefines()
2604 case SSE1: in getTargetDefines()
2652 .Case("sse", SSELevel >= SSE1) in hasFeature()
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| /external/valgrind/main/docs/internals/ |
| D | 3_0_BUGSTATUS.txt | 426 110274 SSE1 now mandatory for x86
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| /external/llvm/include/llvm/IR/ |
| D | IntrinsicsX86.td | 98 // SSE1
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| /external/valgrind/main/ |
| D | NEWS | 2362 110274 SSE1 now mandatory for x86
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