/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 220 bool isBarrier() const { in isBarrier() function 253 return isBranch() & !isBarrier() & !isIndirectBranch(); in isConditionalBranch() 261 return isBranch() & isBarrier() & !isIndirectBranch(); in isUnconditionalBranch()
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/external/llvm/lib/Target/X86/ |
D | X86InstrControl.td | 22 let isTerminator = 1, isReturn = 1, isBarrier = 1, 49 let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in { 111 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { 202 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, 266 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1,
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/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops-not-barriers.ll | 21 ; with isBarrier. For now, look for something that looks like "somewhere".
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/external/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 53 if (!LastMI->isBarrier() && in getHazardType()
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D | ARMInstrThumb.td | 414 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { 425 let isReturn = 1, isTerminator = 1, isBarrier = 1 in { 487 let isBranch = 1, isTerminator = 1, isBarrier = 1 in { 528 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in { 562 let isBarrier = 1, isTerminator = 1 in 1261 hasSideEffects = 1, isBarrier = 1, isCodeGenOnly = 1, 1268 let isBarrier = 1, hasSideEffects = 1, isTerminator = 1, isCodeGenOnly = 1, 1406 let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, 1413 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
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D | MLxExpansionPass.cpp | 344 if (MI->isBarrier()) { in ExpandFPMLxInstructions()
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D | ARMInstrInfo.td | 1853 let isBarrier = 1, isTerminator = 1 in 1859 let isBarrier = 1, isTerminator = 1 in 1942 let isReturn = 1, isTerminator = 1, isBarrier = 1 in { 1959 let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in { 2053 let isBarrier = 1 in { 2082 } // isBarrier = 1 2108 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [SP] in { 2933 let isReturn = 1, isTerminator = 1, isBarrier = 1, mayLoad = 1, 4917 hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in { 4926 hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in { [all …]
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 356 bool isBarrier(QueryType Type = AnyInBundle) const { 389 return isBranch(Type) & !isBarrier(Type) & !isIndirectBranch(Type); 397 return isBranch(Type) & isBarrier(Type) & !isIndirectBranch(Type);
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstr64Bit.td | 84 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { 212 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 218 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 223 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 230 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, 237 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 244 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 282 let hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in {
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D | PPCInstrInfo.td | 890 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { 908 let isBarrier = 1 in { 1056 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1063 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1068 let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in 1076 let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, 1082 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 1088 isBarrier = 1, isCall = 1, isReturn = 1, Uses = [RM] in 1095 let hasSideEffects = 1, isBarrier = 1, usesCustomInserter = 1 in { 1239 let isTerminator = 1, isBarrier = 1, hasCtrlDep = 1 in
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/external/llvm/utils/TableGen/ |
D | CodeGenInstruction.h | 225 bool isBarrier; variable
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D | InstrInfoEmitter.cpp | 461 if (Inst.isBarrier) OS << "|(1<<MCID::Barrier)"; in emitRecord()
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D | CodeGenInstruction.cpp | 303 isBarrier = R->getValueAsBit("isBarrier"); in CodeGenInstruction()
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/external/llvm/lib/Target/Sparc/ |
D | SparcAsmPrinter.cpp | 264 return I == Pred->end() || !I->isBarrier(); in isBlockOnlyReachableByFallthrough()
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D | SparcInstrInfo.td | 288 let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1 in { 513 let isBarrier = 1 in 519 let isTerminator = 1, isBarrier = 1,
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/external/llvm/lib/Target/XCore/ |
D | XCoreInstrInfo.td | 604 let isReturn = 1, isTerminator = 1, mayLoad = 1, isBarrier = 1 in { 615 let isBranch = 1, isTerminator = 1, isBarrier = 1 in { 643 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1, 924 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 929 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 934 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 939 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in 1071 let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1,
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 210 bit isBarrier = 1; 579 let isBarrier=1; 591 let isBarrier = 1; 598 let isTerminator=1, isBarrier=1, hasDelaySlot = 1 in 644 let isBarrier = 1; 827 let isBarrier = 1, isTerminator = 1, isCodeGenOnly = 1 in 837 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1 in 1023 let Uses = [V0, V1], isTerminator = 1, isReturn = 1, isBarrier = 1 in {
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D | Mips16InstrInfo.td | 469 bit isBarrier = 1; 690 let isBarrier=1; 706 let isBarrier=1; 713 let isBarrier=1; 720 let isBarrier=1; 1312 let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
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D | MipsAsmPrinter.cpp | 328 return !I->isBarrier(); in isBlockOnlyReachableByFallthrough()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.cpp | 162 if (MI->isBranch() && !MI->isBarrier()) in isUnpredicatedTerminator()
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/external/llvm/lib/CodeGen/ |
D | MachineVerifier.cpp | 573 if (!MBB->empty() && getBundleStart(&MBB->back())->isBarrier() && in visitMachineBasicBlockBefore() 594 } else if (!getBundleStart(&MBB->back())->isBarrier()) { in visitMachineBasicBlockBefore() 625 } else if (getBundleStart(&MBB->back())->isBarrier()) { in visitMachineBasicBlockBefore() 653 } else if (!getBundleStart(&MBB->back())->isBarrier()) { in visitMachineBasicBlockBefore()
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D | TargetInstrInfo.cpp | 205 if (MI->isBranch() && !MI->isBarrier()) in isUnpredicatedTerminator()
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D | BranchFolding.cpp | 560 !MBB1->back().isBarrier() && in ProfitableToMerge() 561 !MBB2->back().isBarrier()) in ProfitableToMerge()
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/external/llvm/docs/ |
D | TableGenFundamentals.rst | 87 bit isBarrier = 0; 708 let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in
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/external/llvm/lib/Target/R600/ |
D | SIInstructions.td | 732 let isBarrier = 1; 740 let isBarrier = 1; 788 let isBarrier = 1;
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