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Searched refs:isPredicable (Results 1 – 25 of 46) sorted by relevance

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/external/llvm/lib/Target/R600/
DAMDGPUInstrInfo.cpp207 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable() function in AMDGPUInstrInfo
209 return MI->getDesc().isPredicable(); in isPredicable()
DAMDGPUInstrInfo.h123 bool isPredicable(MachineInstr *MI) const;
DR600InstrInfo.h151 bool isPredicable(MachineInstr *MI) const;
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
DAMDGPUInstrInfo.cpp227 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable() function in AMDGPUInstrInfo
229 return MI->getDesc().isPredicable(); in isPredicable()
DR600InstrInfo.h77 bool isPredicable(MachineInstr *MI) const;
DR600InstrInfo.cpp360 R600InstrInfo::isPredicable(MachineInstr *MI) const in isPredicable() function in R600InstrInfo
362 return AMDGPUInstrInfo::isPredicable(MI); in isPredicable()
DAMDGPUInstrInfo.h121 bool isPredicable(MachineInstr *MI) const;
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUInstrInfo.cpp227 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable() function in AMDGPUInstrInfo
229 return MI->getDesc().isPredicable(); in isPredicable()
DR600InstrInfo.h77 bool isPredicable(MachineInstr *MI) const;
DR600InstrInfo.cpp360 R600InstrInfo::isPredicable(MachineInstr *MI) const in isPredicable() function in R600InstrInfo
362 return AMDGPUInstrInfo::isPredicable(MI); in isPredicable()
DAMDGPUInstrInfo.h121 bool isPredicable(MachineInstr *MI) const;
/external/llvm/include/llvm/MC/
DMCInstrDesc.h291 bool isPredicable() const { in isPredicable() function
565 if (isPredicable()) { in findFirstPredOperandIdx()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h140 bool isPredicable; variable
232 bool isPredicable; variable
DCodeGenInstruction.cpp29 isPredicable = false; in CGIOperandList()
94 isPredicable = true; in CGIOperandList()
306 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable"); in CodeGenInstruction()
/external/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp691 if (!NewMCID.isPredicable()) in ReduceTo2Addr()
695 SkipPred = !NewMCID.isPredicable(); in ReduceTo2Addr()
788 if (!NewMCID.isPredicable()) in ReduceToNarrow()
792 SkipPred = !NewMCID.isPredicable(); in ReduceToNarrow()
846 if (!MCID.isPredicable() && NewMCID.isPredicable()) in ReduceToNarrow()
DARMBaseInstrInfo.h94 virtual bool isPredicable(MachineInstr *MI) const;
/external/llvm/include/llvm/Target/
DTargetInstrInfo.h686 virtual bool isPredicable(MachineInstr *MI) const { in isPredicable() function
687 return MI->getDesc().isPredicable(); in isPredicable()
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.h132 virtual bool isPredicable(MachineInstr *MI) const LLVM_OVERRIDE;
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.h200 virtual bool isPredicable(MachineInstr *MI) const;
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.h117 virtual bool isPredicable(MachineInstr *MI) const;
DHexagonInstrInfo.td116 let isPredicable = 1 in
140 let isPredicable = 1 in
194 isPredicable = 1 in
267 let isPredicable = 1 in
313 let isPredicable = 1 in
356 isMoveImm = 1, isPredicable = 1, isReMaterializable = 1 in
454 let isPredicable = 1, neverHasSideEffects = 1 in
754 let InputType = "imm", isBarrier = 1, isPredicable = 1,
796 let isBarrier = 1, Defs = [PC], isPredicable = 1, InputType = "reg" in
882 isCodeGenOnly = 1, Defs = [PC], Uses = [R28], isPredicable = 0 in
[all …]
DHexagonInstrInfoV4.td255 let isPredicable = 1 in
511 let isPredicable = 1 in
550 let isPredicable = 1 in
698 let opExtendable = 2, opExtentBits = 8, isPredicable = 1 in
841 isPredicable = 1 in
898 isPredicable = 1 in
957 let isPredicable = 1 in
2566 let isReturn = 1, isTerminator = 1, isBarrier = 1, isPredicable = 1,
2699 let opExtendable = 0, isPredicable = 1 in
2735 let opExtendable = 0, isPredicable = 1 in
[all …]
DHexagonInstrInfo.cpp637 bool HexagonInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable() function in HexagonInstrInfo
638 bool isPred = MI->getDesc().isPredicable(); in isPredicable()
803 assert (isPredicable(MI) && "Expected predicable instruction"); in PredicateInstruction()
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp207 if (!MI->isPredicable()) in isUnpredicatedTerminator()
221 if (!MI->isPredicable()) in PredicateInstruction()
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.cpp164 if (!MI->isPredicable()) in isUnpredicatedTerminator()

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