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Searched refs:rN (Results 1 – 13 of 13) sorted by relevance

/external/lzma/Asm/x86/
D7zCrcOpt.asm9 rN equ r7 define
21 SRCDAT equ rN + rD + 4 *
42 dec rN
49 mov rN, num_VAR
51 test rN, rN
59 cmp rN, 16
61 add rN, rD
62 mov num_VAR, rN
63 sub rN, 8
64 and rN, NOT 7
[all …]
/external/valgrind/main/VEX/priv/
Dguest_arm_toIR.c2376 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, in mk_EA_reg_plusminus_imm12() argument
2379 vassert(rN < 16); in mk_EA_reg_plusminus_imm12()
2383 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12); in mk_EA_reg_plusminus_imm12()
2386 getIRegA(rN), in mk_EA_reg_plusminus_imm12()
2395 IRExpr* mk_EA_reg_plusminus_shifted_reg ( UInt rN, UInt bU, UInt rM, in mk_EA_reg_plusminus_shifted_reg() argument
2399 vassert(rN < 16); in mk_EA_reg_plusminus_shifted_reg()
2410 DIS(buf, "[r%u, %c r%u LSL #%u]", rN, opChar, rM, imm5); in mk_EA_reg_plusminus_shifted_reg()
2420 rN, opChar, rM, imm5 == 0 ? 32 : imm5); in mk_EA_reg_plusminus_shifted_reg()
2432 rN, opChar, rM, imm5 == 0 ? 32 : imm5); in mk_EA_reg_plusminus_shifted_reg()
2443 DIS(buf, "[r%u, %cr%u, RRX]", rN, opChar, rM); in mk_EA_reg_plusminus_shifted_reg()
[all …]
Dhost_arm_defs.c379 ARMAModeN *mkARMAModeN_RR ( HReg rN, HReg rM ) { in mkARMAModeN_RR() argument
382 am->ARMamN.RR.rN = rN; in mkARMAModeN_RR()
387 ARMAModeN *mkARMAModeN_R ( HReg rN ) { in mkARMAModeN_R() argument
390 am->ARMamN.R.rN = rN; in mkARMAModeN_R()
396 addHRegUse(u, HRmRead, am->ARMamN.R.rN); in addRegUsage_ARMAModeN()
398 addHRegUse(u, HRmRead, am->ARMamN.RR.rN); in addRegUsage_ARMAModeN()
405 am->ARMamN.R.rN = lookupHRegRemap(m, am->ARMamN.R.rN); in mapRegs_ARMAModeN()
407 am->ARMamN.RR.rN = lookupHRegRemap(m, am->ARMamN.RR.rN); in mapRegs_ARMAModeN()
415 ppHRegARM(am->ARMamN.R.rN); in ppARMAModeN()
417 ppHRegARM(am->ARMamN.RR.rN); in ppARMAModeN()
[all …]
Dhost_arm_defs.h208 HReg rN; member
212 HReg rN; member
936 HReg rN; member
1006 extern ARMInstr* ARMInstr_Add32 ( HReg rD, HReg rN, UInt imm32 );
/external/chromium_org/third_party/x86inc/
Dx86inc.asm144 ; rN and rNq are the native-size register holding function argument N
/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td176 // then nonvolatiles in reverse order since stmw/lmw save from rN to r31
/external/scrypt/patches/
Darm-neon.patch262 + * temporary storage V must be 128rN bytes in length; the temporary storage
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-US/
Den-US_lh0_kpdf_phs.pkb2510  +%!���   ��� ���������� G�����ާrN=5+/-�� 
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-GB/
Den-GB_kdt_g2p.pkb291 [��-c���� ��%O�C|x X���� g���������c��?NvW )@���@��rN�AT��-�L` )�<]Q�[Ry�v�'`d�$��
/external/valgrind/main/none/tests/arm/
Dvfp.c605 #define TESTINSN_VLDR(instruction, dD, rN, rNval, offset) \ argument
611 "mov " #rN ", %1\n\t" \
/external/chromium_org/media/test/data/
Dbear-1280x720.ts1852 f@H�����8�K�����Yh��w�o��ߐPDU[�l�rN��k��,���BG��6D�{W���D�6f���Ƥ���K�Gq:�(
Dbear-1280x720_ptswraparound.ts1850 f@H�����8�K�����Yh��w�o��ߐPDU[�l�rN��k��,���BG��6D�{W���D�6f���Ƥ���K�Gq:�(
/external/chromium_org/v8/tools/profviz/
Dgnuplot-4.6.3-emscripten.js4495rN=0,rO=0,rP=0,rQ=0,rR=0.0,rS=0,rT=0,rU=0,rV=0,rW=0,rX=0,rY=0,rZ=0,r_=0,r$=0,r0=0,r1=0,r2=0,r3=0,r…
4496 …;b=b|0;d=d|0;e=e|0;f=f|0;s5(a,b,d,e,1,f);c[816]=d;c[814]=e;return}function rN(){var b=0;g[57768]=0… function
4499 …vq,rU,vq,p0,vq,dW,vq,nV,vq,dY,vq,lI,vq,pc,vq,qI,vq,ek,vq,oy,vq,oG,vq,sg,vq,rN,vq,d5,vq,dE,vq,em,vq…