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Searched refs:setMemRefs (Results 1 – 23 of 23) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp432 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVLD()
483 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVST()
573 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandLaneOp()
637 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
638 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
674 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
675 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
856 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
871 MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
927 MIB3->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
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DARMISelDAGToDAG.cpp1843 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD()
1961 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
1984 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2003 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2108 cast<MachineSDNode>(VLdLn)->setMemRefs(MemOp, MemOp + 1); in SelectVLDSTLane()
2194 cast<MachineSDNode>(VLdDup)->setMemRefs(MemOp, MemOp + 1); in SelectVLDDup()
2585 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); in SelectAtomic64()
3193 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
3256 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in Select()
DThumb2SizeReduction.cpp515 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in ReduceLoadStore()
DARMLoadStoreOptimizer.cpp787 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in MergeBaseUpdateLSMultiple()
1571 MI->setMemRefs(MemBegin, MemEnd); in concatenateMemOperands()
DARMBaseInstrInfo.cpp1271 MIB->setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end()); in reMaterialize()
/external/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.cpp422 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectBaseOffsetLoad()
459 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadSignExtend64()
483 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadSignExtend64()
531 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadZeroExtend64()
562 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadZeroExtend64()
636 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoad()
659 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoad()
722 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
753 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
804 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectBaseOffsetStore()
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h159 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b, in setMemRefs() function
161 MI->setMemRefs(b, e); in setMemRefs()
DMachineInstr.h997 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
DSelectionDAGNodes.h1772 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp421 cast<MachineSDNode>(NVPTXLD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLoad()
805 cast<MachineSDNode>(LD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLoadVector()
1290 cast<MachineSDNode>(LD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLDGLDUVector()
1520 cast<MachineSDNode>(NVPTXST)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStore()
1897 cast<MachineSDNode>(ST)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreVector()
2149 cast<MachineSDNode>(Ret)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreRetval()
2305 cast<MachineSDNode>(Ret)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreParam()
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp286 MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end()); in genInstrWithNewOpc()
/external/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp133 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp373 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectIndexedBinOp()
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp427 NewMI->setMemRefs(LoadMI->memoperands_begin(), in foldMemoryOperand()
DMachineInstr.cpp751 setMemRefs(NewMemRefs, NewMemRefs + NewNum); in addMemOperand()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGSDNodes.cpp159 MN->setMemRefs(Begin, End); in CloneNodeWithValues()
DInstrEmitter.cpp760 MIB.setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(), in EmitMachineNode()
DSelectionDAGISel.cpp2803 ->setMemRefs(MemRefs, MemRefs + NumMemRefs); in SelectCodeCommon()
DSelectionDAG.cpp5225 MN->setMemRefs(0, 0); in MorphNodeTo()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1575 cast<MachineSDNode>(ResNode)->setMemRefs(MemOp, MemOp + 1); in SelectAtomic64()
1847 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadArith()
2761 Result->setMemRefs(MemOp, MemOp + 2); in Select()
DX86ISelLowering.cpp13882 MIB.setMemRefs(MMOBegin, MMOEnd); in EmitAtomicLoadArith()
14050 MIB.setMemRefs(LowMI->memoperands_begin(), LowMI->memoperands_end()); in EmitAtomicLoadArith6432()
14176 MIB.setMemRefs(MMOBegin, MMOEnd); in EmitAtomicLoadArith6432()
14227 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in EmitPCMPSTRM()
14264 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in EmitPCMPSTRI()
14429 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
14454 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
14482 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
14501 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
14538 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
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DX86InstrInfo.cpp3118 (*MIB).setMemRefs(MMOBegin, MMOEnd); in storeRegToAddr()
3151 (*MIB).setMemRefs(MMOBegin, MMOEnd); in loadRegFromAddr()
4428 cast<MachineSDNode>(Load)->setMemRefs(MMOs.first, MMOs.second); in unfoldMemoryOperand()
4472 cast<MachineSDNode>(Load)->setMemRefs(MMOs.first, MMOs.second); in unfoldMemoryOperand()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp6119 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
6136 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
6171 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
6232 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
6244 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
6256 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
6268 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
6276 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()