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/external/llvm/lib/Target/X86/
DX86InstrFMA.td25 (ins VR128:$src1, VR128:$src2, VR128:$src3),
27 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
29 VR128:$src1, VR128:$src3)))]>;
33 (ins VR128:$src1, VR128:$src2, f128mem:$src3),
35 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
37 (MemFrag128 addr:$src3))))]>;
41 (ins VR256:$src1, VR256:$src2, VR256:$src3),
43 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
45 VR256:$src3)))]>, VEX_L;
49 (ins VR256:$src1, VR256:$src2, f256mem:$src3),
[all …]
DX86InstrXOP.td147 (ins VR128:$src1, VR128:$src2, VR128:$src3),
149 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
151 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_4V, VEX_I8IMM;
153 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
155 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
158 VR128:$src3))]>, VEX_4V, VEX_I8IMM;
179 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
181 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
182 [(set VR128:$dst, (Int VR128:$src1, VR128:$src2, imm:$src3))]>,
185 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
[all …]
DX86InstrAVX512.td89 (ins VR512:$src1, VR128X:$src2, i8imm:$src3),
90 "vinsertf32x4\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
94 (ins VR512:$src1, f128mem:$src2, i8imm:$src3),
95 "vinsertf32x4\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
102 (ins VR512:$src1, VR256X:$src2, i8imm:$src3),
103 "vinsertf64x4\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
107 (ins VR512:$src1, i256mem:$src2, i8imm:$src3),
108 "vinsertf64x4\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
114 (ins VR512:$src1, VR128X:$src2, i8imm:$src3),
115 "vinserti32x4\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
[all …]
DX86InstrShiftRotate.td739 (ins GR16:$src1, GR16:$src2, i8imm:$src3),
740 "shld{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
742 (i8 imm:$src3)))], IIC_SHD16_REG_IM>,
746 (ins GR16:$src1, GR16:$src2, i8imm:$src3),
747 "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
749 (i8 imm:$src3)))], IIC_SHD16_REG_IM>,
753 (ins GR32:$src1, GR32:$src2, i8imm:$src3),
754 "shld{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
756 (i8 imm:$src3)))], IIC_SHD32_REG_IM>,
760 (ins GR32:$src1, GR32:$src2, i8imm:$src3),
[all …]
DX86InstrMMX.td168 (ins VR64:$src1, VR64:$src2, i8imm:$src3),
169 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
170 [(set VR64:$dst, (IntId VR64:$src1, VR64:$src2, (i8 imm:$src3)))]>;
172 (ins VR64:$src1, i64mem:$src2, i8imm:$src3),
173 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
175 (bitconvert (load_mmx addr:$src2)), (i8 imm:$src3)))]>;
566 (ins VR64:$src1, GR32:$src2, i32i8imm:$src3),
567 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
569 GR32:$src2, (iPTR imm:$src3)))],
574 (ins VR64:$src1, i16mem:$src2, i32i8imm:$src3),
[all …]
DX86InstrSSE.td2500 (ins RC:$src1, x86memop:$src2, i8imm:$src3), asm,
2502 (i8 imm:$src3))))], IIC_SSE_SHUFP, d>,
2506 (ins RC:$src1, RC:$src2, i8imm:$src3), asm,
2508 (i8 imm:$src3))))], IIC_SSE_SHUFP, d>,
2513 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2516 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2519 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src2, $src2, $src3}",
2522 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src2, $src2, $src3}",
2527 "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2531 "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonIntrinsicsV4.td76 IntRegs:$src3),
78 "($src1, and($src2, !$src3)")),
80 IntRegs:$src3))]>;
84 IntRegs:$src3),
86 "($src1, and($src2, $src3)")),
88 IntRegs:$src3))]>;
92 IntRegs:$src3),
94 "($src1, or($src2, !$src3)")),
96 IntRegs:$src3))]>;
100 IntRegs:$src3),
[all …]
DHexagonInstrInfoV4.td238 (ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$offset),
240 ") ")#"$dst = "#mnemonic#"($src2+$src3<<#$offset)",
492 (ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
495 ") ")#mnemonic#"($src2+$src3<<#$src4) = $src5",
513 (ins IntRegs:$src1, IntRegs:$src2, u2Imm:$src3, RC:$src4),
514 mnemonic#"($src1+$src2<<#$src3) = $src4",
531 (ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
534 ") ")#mnemonic#"($src2+$src3<<#$src4) = $src5.new",
552 (ins IntRegs:$src1, IntRegs:$src2, u2Imm:$src3, RC:$src4),
553 mnemonic#"($src1+$src2<<#$src3) = $src4.new",
[all …]
DHexagonInstrInfoV5.td106 (ins IntRegs:$src1, s11_2Imm:$src2, IntRegs:$src3),
107 "memw($src1+#$src2) = $src3",
108 [(store (f32 IntRegs:$src3),
121 (ins IntRegs:$src1, s11_3Imm:$src2, DoubleRegs:$src3),
122 "memd($src1+#$src2) = $src3",
123 [(store (f64 DoubleRegs:$src3),
478 (ins DoubleRegs:$src1, DoubleRegs:$src2, DoubleRegs:$src3),
479 "$dst += dfmpy($src2, $src3)",
481 (fma DoubleRegs:$src2, DoubleRegs:$src3, DoubleRegs:$src1))],
486 (ins IntRegs:$src1, IntRegs:$src2, IntRegs:$src3),
[all …]
DHexagonInstrInfo.td99 (ins PredRegs:$src1, IntRegs:$src2, IntRegs: $src3),
101 ") $dst = ")#mnemonic#"($src2, $src3)",
176 (ins PredRegs:$src1, IntRegs:$src2, s8Ext: $src3),
178 ") $dst = ")#mnemonic#"($src2, #$src3)",
396 DoubleRegs:$src3),
397 "$dst = vmux($src1, $src2, $src3)",
402 IntRegs:$src2, IntRegs:$src3),
403 "$dst = mux($src1, $src2, $src3)",
406 (i32 IntRegs:$src3))))]>, ImmRegRel;
411 IntRegs:$src3),
[all …]
DHexagonIntrinsics.td47 IntRegs:$src3),
48 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, $src3)")),
50 IntRegs:$src3))]>;
54 IntRegs:$src3),
55 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2, $src3)")),
57 IntRegs:$src3))]>;
61 s8Imm:$src3),
62 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2, #$src3)")),
64 imm:$src3))]>;
67 : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2, s8Imm:$src3),
[all …]
/external/bison/lib/
Dbitset.c409 bitset_op4_cmp (bitset dst, bitset src1, bitset src2, bitset src3, in bitset_op4_cmp() argument
429 changed = bitset_and_cmp (dst, src3, tmp); in bitset_op4_cmp()
434 changed = bitset_or_cmp (dst, src3, tmp); in bitset_op4_cmp()
439 changed = bitset_or_cmp (dst, src3, tmp); in bitset_op4_cmp()
450 bitset_and_or_ (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_and_or_() argument
452 bitset_and_or_cmp_ (dst, src1, src2, src3); in bitset_and_or_()
459 bitset_and_or_cmp_ (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_and_or_cmp_() argument
461 return bitset_op4_cmp (dst, src1, src2, src3, BITSET_OP_AND_OR); in bitset_and_or_cmp_()
467 bitset_andn_or_ (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_andn_or_() argument
469 bitset_andn_or_cmp_ (dst, src1, src2, src3); in bitset_andn_or_()
[all …]
Dbitset_stats.c524 bitset_stats_and_or (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_stats_and_or() argument
526 BITSET_CHECK4_ (dst, src1, src2, src3); in bitset_stats_and_or()
527 BITSET_AND_OR_ (dst->s.bset, src1->s.bset, src2->s.bset, src3->s.bset); in bitset_stats_and_or()
532 bitset_stats_and_or_cmp (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_stats_and_or_cmp() argument
534 BITSET_CHECK4_ (dst, src1, src2, src3); in bitset_stats_and_or_cmp()
535 return BITSET_AND_OR_CMP_ (dst->s.bset, src1->s.bset, src2->s.bset, src3->s.bset); in bitset_stats_and_or_cmp()
540 bitset_stats_andn_or (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_stats_andn_or() argument
542 BITSET_CHECK4_ (dst, src1, src2, src3); in bitset_stats_andn_or()
543 BITSET_ANDN_OR_ (dst->s.bset, src1->s.bset, src2->s.bset, src3->s.bset); in bitset_stats_andn_or()
548 bitset_stats_andn_or_cmp (bitset dst, bitset src1, bitset src2, bitset src3) in bitset_stats_andn_or_cmp() argument
[all …]
Dvbitset.c872 vbitset_and_or (bitset dst, bitset src1, bitset src2, bitset src3) in vbitset_and_or() argument
882 || BITSET_NBITS_ (src1) != BITSET_NBITS_ (src3)) in vbitset_and_or()
884 bitset_and_or_ (dst, src1, src2, src3); in vbitset_and_or()
892 src3p = VBITSET_WORDS (src3); in vbitset_and_or()
902 vbitset_and_or_cmp (bitset dst, bitset src1, bitset src2, bitset src3) in vbitset_and_or_cmp() argument
913 || BITSET_NBITS_ (src1) != BITSET_NBITS_ (src3)) in vbitset_and_or_cmp()
914 return bitset_and_or_cmp_ (dst, src1, src2, src3); in vbitset_and_or_cmp()
920 src3p = VBITSET_WORDS (src3); in vbitset_and_or_cmp()
939 vbitset_andn_or (bitset dst, bitset src1, bitset src2, bitset src3) in vbitset_andn_or() argument
949 || BITSET_NBITS_ (src1) != BITSET_NBITS_ (src3)) in vbitset_andn_or()
[all …]
Dabitset.c579 abitset_and_or (bitset dst, bitset src1, bitset src2, bitset src3) in abitset_and_or() argument
584 bitset_word *src3p = ABITSET_WORDS (src3); in abitset_and_or()
594 abitset_and_or_cmp (bitset dst, bitset src1, bitset src2, bitset src3) in abitset_and_or_cmp() argument
600 bitset_word *src3p = ABITSET_WORDS (src3); in abitset_and_or_cmp()
619 abitset_andn_or (bitset dst, bitset src1, bitset src2, bitset src3) in abitset_andn_or() argument
624 bitset_word *src3p = ABITSET_WORDS (src3); in abitset_andn_or()
634 abitset_andn_or_cmp (bitset dst, bitset src1, bitset src2, bitset src3) in abitset_andn_or_cmp() argument
640 bitset_word *src3p = ABITSET_WORDS (src3); in abitset_andn_or_cmp()
659 abitset_or_and (bitset dst, bitset src1, bitset src2, bitset src3) in abitset_or_and() argument
664 bitset_word *src3p = ABITSET_WORDS (src3); in abitset_or_and()
[all …]
/external/v8/src/arm/
Dmacro-assembler-arm.h315 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
317 ASSERT(!src2.is(src3));
318 ASSERT(!src1.is(src3));
320 if (src2.code() > src3.code()) {
321 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
324 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
328 Push(src2, src3, cond);
335 Register src3,
339 ASSERT(!src2.is(src3));
340 ASSERT(!src1.is(src3));
[all …]
/external/chromium_org/v8/src/arm/
Dmacro-assembler-arm.h317 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
319 ASSERT(!src2.is(src3));
320 ASSERT(!src1.is(src3));
322 if (src2.code() > src3.code()) {
323 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
326 str(src3, MemOperand(sp, 4, NegPreIndex), cond);
330 Push(src2, src3, cond);
337 Register src3,
341 ASSERT(!src2.is(src3));
342 ASSERT(!src1.is(src3));
[all …]
/external/chromium_org/media/base/simd/
Dfilter_yuv_mmx.cc52 __m64 src3 = _mm_unpackhi_pi8(src1, zero); in FilterYUVRows_MMX() local
58 src3 = _mm_mullo_pi16(src3, src1_fraction); in FilterYUVRows_MMX()
60 src2 = _mm_add_pi16(src2, src3); in FilterYUVRows_MMX()
Dfilter_yuv_sse2.cc47 __m128i src3 = _mm_unpackhi_epi8(src1, zero); in FilterYUVRows_SSE2() local
53 src3 = _mm_mullo_epi16(src3, src1_fraction); in FilterYUVRows_SSE2()
55 src2 = _mm_add_epi16(src2, src3); in FilterYUVRows_SSE2()
/external/pixman/demos/
Dscreen-test.c14 uint32_t *src3 = malloc (WIDTH * HEIGHT * 4); in main() local
24 src3[i] = 0x7f0000ff; in main()
34 simg3 = pixman_image_create_bits (PIXMAN_a8r8g8b8, WIDTH, HEIGHT, src3, WIDTH * 4); in main()
/external/llvm/test/TableGen/
Dusevalname.td18 def rri : Instr<[(set RC:$dst, (shufp:$src3
22 // CHECK: shufp:src3
/external/clang/test/SemaOpenCL/
Devent_t_overload.cl6 void kernel ker(__local char *src1, __local float *src2, __global int *src3) {
10 foo(evt, src3); // expected-error {{no matching function for call to 'foo'}}
/external/opencv/cxcore/src/
Dcxcmp.cpp58 a2 = src2[x], a3 = src3[x]; \
68 a2 = src2[x*2], a3 = src3[x*2]; \
72 a3 = src3[x*2+1]; \
82 a2 = src2[x*3], a3 = src3[x*3]; \
86 a3 = src3[x*3+1]; \
90 a3 = src3[x*3+2]; \
100 a2 = src2[x*4], a3 = src3[x*4]; \
104 a3 = src3[x*4+1]; \
108 a3 = src3[x*4+2]; \
112 a3 = src3[x*4+3]; \
[all …]
/external/skia/gm/
Dimage.cpp90 SkRect src1, src2, src3; in test_surface() local
94 src3.iset(0, 0, surf->width() / 2, surf->height() / 2); in test_surface()
104 imgR->draw(canvas, &src3, dst3, usePaint ? &paint : NULL); in test_surface()
/external/opencv/cv/src/
Dcvderiv.cpp91 float* src3 = src + src_step*2; in icvSepConvSmall3_32f() local
94 buffer[x] = (float)(ky[0]*src[x] + ky[1]*src2[x] + ky[2]*src3[x]); in icvSepConvSmall3_32f()
609 … const int *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; in icvLaplaceCol_32s16s() local
615 (src1[i+width] + src3[i+width])*4 + src2[i+width]*6; in icvLaplaceCol_32s16s()
617 src4[i+width+1] + (src1[i+width+1] + src3[i+width+1])*4 + in icvLaplaceCol_32s16s()
626 (src1[i+width] + src3[i+width])*4 + src2[i+width]*6, 4); in icvLaplaceCol_32s16s()
629 (src1[i+width+1] + src3[i+width+1])*4 + src2[i+width+1]*6, 4); in icvLaplaceCol_32s16s()
751 … const float *src0 = src[-2], *src1 = src[-1], *src2 = src[0], *src3 = src[1], *src4 = src[2]; in icvLaplaceCol_32f() local
756 (src1[i+width] + src3[i+width])*4 + src2[i+width]*6)*scale; in icvLaplaceCol_32f()
759 (src1[i+width+1] + src3[i+width+1])*4 + src2[i+width+1]*6)*scale; in icvLaplaceCol_32f()

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