Searched refs:v8f64 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86InstrAVX512.td | 4 def : Pat<(v8f64 (bitconvert (v16f32 VR512:$src))), (v8f64 VR512:$src)>;
5 def : Pat<(v8f64 (bitconvert (v16i32 VR512:$src))), (v8f64 VR512:$src)>;
6 def : Pat<(v8f64 (bitconvert (v8i64 VR512:$src))), (v8f64 VR512:$src)>;
9 def : Pat<(v16f32 (bitconvert (v8f64 VR512:$src))), (v16f32 VR512:$src)>;
12 def : Pat<(v8i64 (bitconvert (v8f64 VR512:$src))), (v8i64 VR512:$src)>;
15 def : Pat<(v16i32 (bitconvert (v8f64 VR512:$src))), (v16i32 VR512:$src)>;
16 def : Pat<(v8f64 (bitconvert (v8i64 VR512:$src))), (v8f64 VR512:$src)>;
141 def : Pat<(vinsert128_insert:$ins (v8f64 VR512:$src1), (v2f64 VR128X:$src2),
158 def : Pat<(vinsert128_insert:$ins (v8f64 VR512:$src1), (loadv2f64 addr:$src2),
168 def : Pat<(vinsert256_insert:$ins (v8f64 VR512:$src1), (v4f64 VR256X:$src2),
[all …]
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| D | X86CallingConv.td | 55 CCIfType<[v16i32, v8i64, v16f32, v8f64],
109 CCIfType<[v16f32, v8f64, v16i32, v8i64],
231 CCIfNotVarArg<CCIfType<[v16i32, v8i64, v16f32, v8f64],
251 CCIfType<[v16i32, v8i64, v16f32, v8f64],
274 CCIfType<[v16i32, v16f32, v8f64, v8i64], CCPassIndirect<i64>>,
495 CCIfType<[v16f32, v8f64, v16i32, v8i64],
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| D | X86RegisterInfo.td | 452 def VR512 : RegisterClass<"X86", [v16f32, v8f64, v16i32, v8i64], 512,
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| D | X86ISelLowering.cpp | 1304 addRegisterClass(MVT::v8f64, &X86::VR512RegClass); in resetOperationActions()
1311 setOperationAction(ISD::LOAD, MVT::v8f64, Legal); in resetOperationActions()
1323 setOperationAction(ISD::FADD, MVT::v8f64, Legal); in resetOperationActions()
1324 setOperationAction(ISD::FSUB, MVT::v8f64, Legal); in resetOperationActions()
1325 setOperationAction(ISD::FMUL, MVT::v8f64, Legal); in resetOperationActions()
1326 setOperationAction(ISD::FDIV, MVT::v8f64, Legal); in resetOperationActions()
1327 setOperationAction(ISD::FSQRT, MVT::v8f64, Legal); in resetOperationActions()
1328 setOperationAction(ISD::FNEG, MVT::v8f64, Custom); in resetOperationActions()
1329 setOperationAction(ISD::FMA, MVT::v8f64, Legal); in resetOperationActions()
1356 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f64, Custom); in resetOperationActions()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.h | 103 v8f64 = 48, // 8 x f64 enumerator
106 LAST_FP_VECTOR_VALUETYPE = v8f64,
109 LAST_VECTOR_VALUETYPE = v8f64,
225 return (SimpleTy == MVT::v8f64 || SimpleTy == MVT::v16f32 || in is512BitVector()
297 case v8f64: return f64; in getVectorElementType()
322 case v8f64: return 8; in getVectorNumElements()
406 case v8f64: return 512; in getSizeInBits()
534 if (NumElements == 8) return MVT::v8f64; in getVectorVT()
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| D | ValueTypes.td | 72 def v8f64 : ValueType<512, 48>; // 8 x f64 vector value
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| /external/llvm/lib/IR/ |
| D | ValueTypes.cpp | 166 case MVT::v8f64: return "v8f64"; in getEVTString()
229 case MVT::v8f64: return VectorType::get(Type::getDoubleTy(Context), 8); in getTypeForEVT()
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| /external/llvm/utils/TableGen/ |
| D | CodeGenTarget.cpp | 107 case MVT::v8f64: return "MVT::v8f64"; in getEnumName()
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| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 174 def llvm_v8f64_ty : LLVMType<v8f64>; // 8 x double
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