1%verify "executed" 2 /* 3 * Long integer shift, 2addr version. vA is 64-bit value/result, vB is 4 * 32-bit shift distance. 5 */ 6 /* shl-long/2addr vA, vB */ 7 mov r9, rINST, lsr #8 @ r9<- A+ 8 mov r3, rINST, lsr #12 @ r3<- B 9 and r9, r9, #15 10 GET_VREG(r2, r3) @ r2<- vB 11 add r9, rFP, r9, lsl #2 @ r9<- &fp[A] 12 and r2, r2, #63 @ r2<- r2 & 0x3f 13 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1 14 15 mov r1, r1, asl r2 @ r1<- r1 << r2 16 rsb r3, r2, #32 @ r3<- 32 - r2 17 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2)) 18 subs ip, r2, #32 @ ip<- r2 - 32 19 FETCH_ADVANCE_INST(1) @ advance rPC, load rINST 20 movpl r1, r0, asl ip @ if r2 >= 32, r1<- r0 << (r2-32) 21 mov r0, r0, asl r2 @ r0<- r0 << r2 22 b .L${opcode}_finish 23%break 24 25.L${opcode}_finish: 26 GET_INST_OPCODE(ip) @ extract opcode from rINST 27 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1 28 GOTO_OPCODE(ip) @ jump to next instruction 29