1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl -*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the AArch64 implementation of the MCRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_TARGET_AARCH64REGISTERINFO_H 15 #define LLVM_TARGET_AARCH64REGISTERINFO_H 16 17 #include "llvm/Target/TargetRegisterInfo.h" 18 19 #define GET_REGINFO_HEADER 20 #include "AArch64GenRegisterInfo.inc" 21 22 namespace llvm { 23 24 class AArch64InstrInfo; 25 class AArch64Subtarget; 26 27 struct AArch64RegisterInfo : public AArch64GenRegisterInfo { 28 AArch64RegisterInfo(); 29 30 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; 31 const uint32_t *getCallPreservedMask(CallingConv::ID) const; 32 33 const uint32_t *getTLSDescCallPreservedMask() const; 34 35 BitVector getReservedRegs(const MachineFunction &MF) const; 36 unsigned getFrameRegister(const MachineFunction &MF) const; 37 38 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, 39 unsigned FIOperandNum, 40 RegScavenger *Rs = NULL) const; 41 42 /// getCrossCopyRegClass - Returns a legal register class to copy a register 43 /// in the specified class to or from. Returns original class if it is 44 /// possible to copy between a two registers of the specified class. 45 const TargetRegisterClass * 46 getCrossCopyRegClass(const TargetRegisterClass *RC) const; 47 48 /// getLargestLegalSuperClass - Returns the largest super class of RC that is 49 /// legal to use in the current sub-target and has the same spill size. 50 const TargetRegisterClass* getLargestLegalSuperClassAArch64RegisterInfo51 getLargestLegalSuperClass(const TargetRegisterClass *RC) const { 52 if (RC == &AArch64::tcGPR64RegClass) 53 return &AArch64::GPR64RegClass; 54 55 return RC; 56 } 57 requiresRegisterScavengingAArch64RegisterInfo58 bool requiresRegisterScavenging(const MachineFunction &MF) const { 59 return true; 60 } 61 requiresFrameIndexScavengingAArch64RegisterInfo62 bool requiresFrameIndexScavenging(const MachineFunction &MF) const { 63 return true; 64 } 65 66 bool useFPForScavengingIndex(const MachineFunction &MF) const; 67 }; 68 69 } // end namespace llvm 70 71 #endif // LLVM_TARGET_AARCH64REGISTERINFO_H 72