1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides Mips specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "MCTargetDesc/MipsELFStreamer.h"
15 #include "MipsMCTargetDesc.h"
16 #include "InstPrinter/MipsInstPrinter.h"
17 #include "MipsMCAsmInfo.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MachineLocation.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/TargetRegistry.h"
26
27 #define GET_INSTRINFO_MC_DESC
28 #include "MipsGenInstrInfo.inc"
29
30 #define GET_SUBTARGETINFO_MC_DESC
31 #include "MipsGenSubtargetInfo.inc"
32
33 #define GET_REGINFO_MC_DESC
34 #include "MipsGenRegisterInfo.inc"
35
36 using namespace llvm;
37
ParseMipsTriple(StringRef TT,StringRef CPU)38 static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
39 std::string MipsArchFeature;
40 size_t DashPosition = 0;
41 StringRef TheTriple;
42
43 // Let's see if there is a dash, like mips-unknown-linux.
44 DashPosition = TT.find('-');
45
46 if (DashPosition == StringRef::npos) {
47 // No dash, we check the string size.
48 TheTriple = TT.substr(0);
49 } else {
50 // We are only interested in substring before dash.
51 TheTriple = TT.substr(0,DashPosition);
52 }
53
54 if (TheTriple == "mips" || TheTriple == "mipsel") {
55 if (CPU.empty() || CPU == "mips32") {
56 MipsArchFeature = "+mips32";
57 } else if (CPU == "mips32r2") {
58 MipsArchFeature = "+mips32r2";
59 }
60 } else {
61 if (CPU.empty() || CPU == "mips64") {
62 MipsArchFeature = "+mips64";
63 } else if (CPU == "mips64r2") {
64 MipsArchFeature = "+mips64r2";
65 }
66 }
67 return MipsArchFeature;
68 }
69
createMipsMCInstrInfo()70 static MCInstrInfo *createMipsMCInstrInfo() {
71 MCInstrInfo *X = new MCInstrInfo();
72 InitMipsMCInstrInfo(X);
73 return X;
74 }
75
createMipsMCRegisterInfo(StringRef TT)76 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
77 MCRegisterInfo *X = new MCRegisterInfo();
78 InitMipsMCRegisterInfo(X, Mips::RA);
79 return X;
80 }
81
createMipsMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)82 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
83 StringRef FS) {
84 std::string ArchFS = ParseMipsTriple(TT,CPU);
85 if (!FS.empty()) {
86 if (!ArchFS.empty())
87 ArchFS = ArchFS + "," + FS.str();
88 else
89 ArchFS = FS;
90 }
91 MCSubtargetInfo *X = new MCSubtargetInfo();
92 InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS);
93 return X;
94 }
95
createMipsMCAsmInfo(const MCRegisterInfo & MRI,StringRef TT)96 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
97 MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
98
99 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
100 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
101 MAI->addInitialFrameState(Inst);
102
103 return MAI;
104 }
105
createMipsMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)106 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
107 CodeModel::Model CM,
108 CodeGenOpt::Level OL) {
109 MCCodeGenInfo *X = new MCCodeGenInfo();
110 if (CM == CodeModel::JITDefault)
111 RM = Reloc::Static;
112 else if (RM == Reloc::Default)
113 RM = Reloc::PIC_;
114 X->InitMCCodeGenInfo(RM, CM, OL);
115 return X;
116 }
117
createMipsMCInstPrinter(const Target & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI,const MCSubtargetInfo & STI)118 static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
119 unsigned SyntaxVariant,
120 const MCAsmInfo &MAI,
121 const MCInstrInfo &MII,
122 const MCRegisterInfo &MRI,
123 const MCSubtargetInfo &STI) {
124 return new MipsInstPrinter(MAI, MII, MRI);
125 }
126
createMCStreamer(const Target & T,StringRef TT,MCContext & Ctx,MCAsmBackend & MAB,raw_ostream & _OS,MCCodeEmitter * _Emitter,bool RelaxAll,bool NoExecStack)127 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
128 MCContext &Ctx, MCAsmBackend &MAB,
129 raw_ostream &_OS,
130 MCCodeEmitter *_Emitter,
131 bool RelaxAll,
132 bool NoExecStack) {
133 Triple TheTriple(TT);
134
135 return createMipsELFStreamer(Ctx, MAB, _OS, _Emitter, RelaxAll, NoExecStack);
136 }
137
LLVMInitializeMipsTargetMC()138 extern "C" void LLVMInitializeMipsTargetMC() {
139 // Register the MC asm info.
140 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
141 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
142 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
143 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
144
145 // Register the MC codegen info.
146 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
147 createMipsMCCodeGenInfo);
148 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
149 createMipsMCCodeGenInfo);
150 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
151 createMipsMCCodeGenInfo);
152 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
153 createMipsMCCodeGenInfo);
154
155 // Register the MC instruction info.
156 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
157 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
158 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
159 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
160 createMipsMCInstrInfo);
161
162 // Register the MC register info.
163 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
164 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
165 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
166 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
167 createMipsMCRegisterInfo);
168
169 // Register the MC Code Emitter
170 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
171 createMipsMCCodeEmitterEB);
172 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
173 createMipsMCCodeEmitterEL);
174 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
175 createMipsMCCodeEmitterEB);
176 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
177 createMipsMCCodeEmitterEL);
178
179 // Register the object streamer.
180 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
181 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
182 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
183 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
184 createMCStreamer);
185
186 // Register the asm backend.
187 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
188 createMipsAsmBackendEB32);
189 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
190 createMipsAsmBackendEL32);
191 TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
192 createMipsAsmBackendEB64);
193 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
194 createMipsAsmBackendEL64);
195
196 // Register the MC subtarget info.
197 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
198 createMipsMCSubtargetInfo);
199 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
200 createMipsMCSubtargetInfo);
201 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
202 createMipsMCSubtargetInfo);
203 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
204 createMipsMCSubtargetInfo);
205
206 // Register the MCInstPrinter.
207 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
208 createMipsMCInstPrinter);
209 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
210 createMipsMCInstPrinter);
211 TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
212 createMipsMCInstPrinter);
213 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
214 createMipsMCInstPrinter);
215 }
216