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1set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12add_public_tablegen_target(AMDGPUCommonTableGen)
13
14add_llvm_target(R600CodeGen
15  AMDILCFGStructurizer.cpp
16  AMDILIntrinsicInfo.cpp
17  AMDILISelLowering.cpp
18  AMDGPUAsmPrinter.cpp
19  AMDGPUFrameLowering.cpp
20  AMDGPUIndirectAddressing.cpp
21  AMDGPUISelDAGToDAG.cpp
22  AMDGPUMCInstLower.cpp
23  AMDGPUMachineFunction.cpp
24  AMDGPUSubtarget.cpp
25  AMDGPUTargetMachine.cpp
26  AMDGPUTargetTransformInfo.cpp
27  AMDGPUISelLowering.cpp
28  AMDGPUConvertToISA.cpp
29  AMDGPUInstrInfo.cpp
30  AMDGPURegisterInfo.cpp
31  R600ControlFlowFinalizer.cpp
32  R600EmitClauseMarkers.cpp
33  R600ExpandSpecialInstrs.cpp
34  R600InstrInfo.cpp
35  R600ISelLowering.cpp
36  R600MachineFunctionInfo.cpp
37  R600MachineScheduler.cpp
38  R600OptimizeVectorRegisters.cpp
39  R600Packetizer.cpp
40  R600RegisterInfo.cpp
41  R600TextureIntrinsicsReplacer.cpp
42  SIAnnotateControlFlow.cpp
43  SIFixSGPRCopies.cpp
44  SIInsertWaits.cpp
45  SIInstrInfo.cpp
46  SIISelLowering.cpp
47  SILowerControlFlow.cpp
48  SIMachineFunctionInfo.cpp
49  SIRegisterInfo.cpp
50  )
51
52add_dependencies(LLVMR600CodeGen AMDGPUCommonTableGen intrinsics_gen)
53
54add_subdirectory(InstPrinter)
55add_subdirectory(TargetInfo)
56add_subdirectory(MCTargetDesc)
57