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1 //===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef SYSTEMZMCTARGETDESC_H
11 #define SYSTEMZMCTARGETDESC_H
12 
13 #include "llvm/Support/DataTypes.h"
14 
15 namespace llvm {
16 
17 class MCAsmBackend;
18 class MCCodeEmitter;
19 class MCContext;
20 class MCInstrInfo;
21 class MCObjectWriter;
22 class MCRegisterInfo;
23 class MCSubtargetInfo;
24 class StringRef;
25 class Target;
26 class raw_ostream;
27 
28 extern Target TheSystemZTarget;
29 
30 namespace SystemZMC {
31   // How many bytes are in the ABI-defined, caller-allocated part of
32   // a stack frame.
33   const int64_t CallFrameSize = 160;
34 
35   // The offset of the DWARF CFA from the incoming stack pointer.
36   const int64_t CFAOffsetFromInitialSP = CallFrameSize;
37 
38   // Maps of asm register numbers to LLVM register numbers, with 0 indicating
39   // an invalid register.  In principle we could use 32-bit and 64-bit register
40   // classes directly, provided that we relegated the GPR allocation order
41   // in SystemZRegisterInfo.td to an AltOrder and left the default order
42   // as %r0-%r15.  It seems better to provide the same interface for
43   // all classes though.
44   extern const unsigned GR32Regs[16];
45   extern const unsigned GR64Regs[16];
46   extern const unsigned GR128Regs[16];
47   extern const unsigned FP32Regs[16];
48   extern const unsigned FP64Regs[16];
49   extern const unsigned FP128Regs[16];
50 }
51 
52 MCCodeEmitter *createSystemZMCCodeEmitter(const MCInstrInfo &MCII,
53                                           const MCRegisterInfo &MRI,
54                                           const MCSubtargetInfo &STI,
55                                           MCContext &Ctx);
56 
57 MCAsmBackend *createSystemZMCAsmBackend(const Target &T, StringRef TT,
58                                         StringRef CPU);
59 
60 MCObjectWriter *createSystemZObjectWriter(raw_ostream &OS, uint8_t OSABI);
61 } // end namespace llvm
62 
63 // Defines symbolic names for SystemZ registers.
64 // This defines a mapping from register name to register number.
65 #define GET_REGINFO_ENUM
66 #include "SystemZGenRegisterInfo.inc"
67 
68 // Defines symbolic names for the SystemZ instructions.
69 #define GET_INSTRINFO_ENUM
70 #include "SystemZGenInstrInfo.inc"
71 
72 #define GET_SUBTARGETINFO_ENUM
73 #include "SystemZGenSubtargetInfo.inc"
74 
75 #endif
76