1; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=R600-CHECK %s 2; RUN: llc < %s -march=r600 -mcpu=SI -o - | FileCheck --check-prefix=SI-CHECK %s 3 4; R600-CHECK: @rotr 5; R600-CHECK: BIT_ALIGN_INT 6 7; SI-CHECK: @rotr 8; SI-CHECK: V_ALIGNBIT_B32 9define void @rotr(i32 addrspace(1)* %in, i32 %x, i32 %y) { 10entry: 11 %0 = sub i32 32, %y 12 %1 = shl i32 %x, %0 13 %2 = lshr i32 %x, %y 14 %3 = or i32 %1, %2 15 store i32 %3, i32 addrspace(1)* %in 16 ret void 17} 18 19; R600-CHECK: @rotl 20; R600-CHECK: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x 21; R600-CHECK-NEXT: 32 22; R600-CHECK: BIT_ALIGN_INT {{\** T[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].Z, PV.{{[XYZW]}} 23 24; SI-CHECK: @rotl 25; SI-CHECK: V_SUB_I32_e64 [[DST:VGPR[0-9]+]], 32, {{[SV]GPR[0-9]+}} 26; SI-CHECK: V_ALIGNBIT_B32 {{VGPR[0-9]+, [SV]GPR[0-9]+, VGPR[0-9]+}}, [[DST]] 27define void @rotl(i32 addrspace(1)* %in, i32 %x, i32 %y) { 28entry: 29 %0 = shl i32 %x, %y 30 %1 = sub i32 32, %y 31 %2 = lshr i32 %x, %1 32 %3 = or i32 %0, %2 33 store i32 %3, i32 addrspace(1)* %in 34 ret void 35} 36