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1; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
2; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=CM-CHECK %s
3; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
4
5; floating-point store
6; EG-CHECK: @store_f32
7; EG-CHECK: RAT_WRITE_CACHELESS_32_eg T{{[0-9]+\.X, T[0-9]+\.X}}, 1
8; CM-CHECK: @store_f32
9; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD T{{[0-9]+\.X, T[0-9]+\.X}}
10; SI-CHECK: @store_f32
11; SI-CHECK: BUFFER_STORE_DWORD
12
13define void @store_f32(float addrspace(1)* %out, float %in) {
14  store float %in, float addrspace(1)* %out
15  ret void
16}
17
18; vec2 floating-point stores
19; EG-CHECK: @store_v2f32
20; EG-CHECK: RAT_WRITE_CACHELESS_64_eg
21; CM-CHECK: @store_v2f32
22; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD
23; SI-CHECK: @store_v2f32
24; SI-CHECK: BUFFER_STORE_DWORDX2
25
26define void @store_v2f32(<2 x float> addrspace(1)* %out, float %a, float %b) {
27entry:
28  %0 = insertelement <2 x float> <float 0.0, float 0.0>, float %a, i32 0
29  %1 = insertelement <2 x float> %0, float %b, i32 0
30  store <2 x float> %1, <2 x float> addrspace(1)* %out
31  ret void
32}
33
34; The stores in this function are combined by the optimizer to create a
35; 64-bit store with 32-bit alignment.  This is legal for SI and the legalizer
36; should not try to split the 64-bit store back into 2 32-bit stores.
37;
38; Evergreen / Northern Islands don't support 64-bit stores yet, so there should
39; be two 32-bit stores.
40
41; EG-CHECK: @vecload2
42; EG-CHECK: RAT_WRITE_CACHELESS_64_eg
43; CM-CHECK: @vecload2
44; CM-CHECK: EXPORT_RAT_INST_STORE_DWORD
45; SI-CHECK: @vecload2
46; SI-CHECK: BUFFER_STORE_DWORDX2
47define void @vecload2(i32 addrspace(1)* nocapture %out, i32 addrspace(2)* nocapture %mem) #0 {
48entry:
49  %0 = load i32 addrspace(2)* %mem, align 4, !tbaa !5
50  %arrayidx1.i = getelementptr inbounds i32 addrspace(2)* %mem, i64 1
51  %1 = load i32 addrspace(2)* %arrayidx1.i, align 4, !tbaa !5
52  store i32 %0, i32 addrspace(1)* %out, align 4, !tbaa !5
53  %arrayidx1 = getelementptr inbounds i32 addrspace(1)* %out, i64 1
54  store i32 %1, i32 addrspace(1)* %arrayidx1, align 4, !tbaa !5
55  ret void
56}
57
58attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
59
60!5 = metadata !{metadata !"int", metadata !6}
61!6 = metadata !{metadata !"omnipotent char", metadata !7}
62!7 = metadata !{metadata !"Simple C/C++ TBAA"}
63