1; Test 64-bit compare and swap. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5; Check CSG without a displacement. 6define i64 @f1(i64 %cmp, i64 %swap, i64 *%src) { 7; CHECK-LABEL: f1: 8; CHECK: csg %r2, %r3, 0(%r4) 9; CHECK: br %r14 10 %val = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst 11 ret i64 %val 12} 13 14; Check the high end of the aligned CSG range. 15define i64 @f2(i64 %cmp, i64 %swap, i64 *%src) { 16; CHECK-LABEL: f2: 17; CHECK: csg %r2, %r3, 524280(%r4) 18; CHECK: br %r14 19 %ptr = getelementptr i64 *%src, i64 65535 20 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 21 ret i64 %val 22} 23 24; Check the next doubleword up, which needs separate address logic. 25; Other sequences besides this one would be OK. 26define i64 @f3(i64 %cmp, i64 %swap, i64 *%src) { 27; CHECK-LABEL: f3: 28; CHECK: agfi %r4, 524288 29; CHECK: csg %r2, %r3, 0(%r4) 30; CHECK: br %r14 31 %ptr = getelementptr i64 *%src, i64 65536 32 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 33 ret i64 %val 34} 35 36; Check the high end of the negative aligned CSG range. 37define i64 @f4(i64 %cmp, i64 %swap, i64 *%src) { 38; CHECK-LABEL: f4: 39; CHECK: csg %r2, %r3, -8(%r4) 40; CHECK: br %r14 41 %ptr = getelementptr i64 *%src, i64 -1 42 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 43 ret i64 %val 44} 45 46; Check the low end of the CSG range. 47define i64 @f5(i64 %cmp, i64 %swap, i64 *%src) { 48; CHECK-LABEL: f5: 49; CHECK: csg %r2, %r3, -524288(%r4) 50; CHECK: br %r14 51 %ptr = getelementptr i64 *%src, i64 -65536 52 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 53 ret i64 %val 54} 55 56; Check the next doubleword down, which needs separate address logic. 57; Other sequences besides this one would be OK. 58define i64 @f6(i64 %cmp, i64 %swap, i64 *%src) { 59; CHECK-LABEL: f6: 60; CHECK: agfi %r4, -524296 61; CHECK: csg %r2, %r3, 0(%r4) 62; CHECK: br %r14 63 %ptr = getelementptr i64 *%src, i64 -65537 64 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 65 ret i64 %val 66} 67 68; Check that CSG does not allow an index. 69define i64 @f7(i64 %cmp, i64 %swap, i64 %src, i64 %index) { 70; CHECK-LABEL: f7: 71; CHECK: agr %r4, %r5 72; CHECK: csg %r2, %r3, 0(%r4) 73; CHECK: br %r14 74 %add1 = add i64 %src, %index 75 %ptr = inttoptr i64 %add1 to i64 * 76 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst 77 ret i64 %val 78} 79 80; Check that a constant %cmp value is loaded into a register first. 81define i64 @f8(i64 %dummy, i64 %swap, i64 *%ptr) { 82; CHECK-LABEL: f8: 83; CHECK: lghi %r2, 1001 84; CHECK: csg %r2, %r3, 0(%r4) 85; CHECK: br %r14 86 %val = cmpxchg i64 *%ptr, i64 1001, i64 %swap seq_cst 87 ret i64 %val 88} 89 90; Check that a constant %swap value is loaded into a register first. 91define i64 @f9(i64 %cmp, i64 *%ptr) { 92; CHECK-LABEL: f9: 93; CHECK: lghi [[SWAP:%r[0-9]+]], 1002 94; CHECK: csg %r2, [[SWAP]], 0(%r3) 95; CHECK: br %r14 96 %val = cmpxchg i64 *%ptr, i64 %cmp, i64 1002 seq_cst 97 ret i64 %val 98} 99